Analog Devices ADRV9029 User Manual Download

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Preliminary Technical

Data

Rev. PrA | Page 5 of 82

TRANSCEIVER DPD OVERVIEW

The DPD feature on this transceiver enables users to offload power amplifier linearization tasks from the baseband processor to

the transceiver. With DPD implemented on the transceiver, the user does not need to allocate JESD serializer/de-serializer

resources for observing power amplifier feedback data through the ORx channels, resulting in significant system power savings.

Interpolators leading to the DPD actuator allow the baseband processor to transmit data at a lower rate on the JESD204B/C link

than is needed for the full DPD correction bandwidth. The lower data rate at JESD translates directly into power savings and less

number of lanes. Integration of the DPD into the transceiver chip results in significant system level cost, space, and power savings

when compared to conventional FPGA/ASIC based implementations.
A simplified block diagram of the transceiver DPD system is shown in Figure 4. A brief description of the individual blocks is

provided below.

•

Transmit Datapath

– The digital baseband signal from the JESD de-framer output goes through an optional Crest Factor

Reduction (CFR) block for reduction of the overall peak to average power ratio(PAPR) of the signal followed by a digital

interpolation filter which interpolates the baseband signal by a factor of 1x, 2x or 4x for analyzing the baseband signal over

the DPD analysis bandwidth. The inverse PA model is applied by the DPD engine, followed by the rest of the transmit signal

chain including digital to analog conversion, up conversion by a mixer before the signal is fed into the actual amplifier.

•

Observation Datapath

– The DPD algorithm relies on observing the non-linearities via a feedback path. The feedback path

is realized using an integrated observation receiver (ORx). The PA output data is sampled through the observation receiver,

down converted and digitized for further analysis by the firmware.

•

DPD Processing

- The DPD engine is based on an abbreviated implementation of generalized memory polynomial (GMP)

that is a generalized subset of the well-known Volterra series. The simplified polynomial models a large number of PA

characteristics such as weak nonlinearities, temperature variation, and memory effects. The inverse PA model is applied on

the interpolated digital baseband samples through DPD actuator hardware. A dedicated embedded ARM processor (ARM-D)

is used for computation of the GMP coefficients.

1,2

Model

FILTER/DUPLEXER

ORx

ARM-C, ARM-D

HW ACCEL

-1

Data From

CFR

ADRV9029 DPD

Firmware

DPD Actuator

1,2

Figure 4. Simplified Block Diagram of Transceiver DPD

DPD Actuator Overview

The DPD actuator implements a programmable GMP calculator captured in the equation below.

To compensate for memory effects in a large bandwidth signal, a higher order polynomial is required. The DPD actuator can be

programmed to support up to 190 coefficients for wide bandwidth signals. The structure of the DPD actuator is shown in Figure

5. For every pre-distorted output, the GMP model calculates the Sum of Product expression. The product terms consists of a

modeling coefficient c

i,j,k,

magnitude power term |x(n-i)|

, and cross memory term x(n-j). Each DPD model consisting of GMP

terms can utilize up to 31 look-up-tables (LUT) on one specified bank. The LUTs are 1k samples deep and organized in four banks

of 8-bit tables (256 entries). Please refer to the GMP Model and Transceiver Look Up Table section for more information on the

mapping GMP terms to LUTs.

Summary of Contents for ADRV9029

Page 1: ...9029 Transceiver DPD CLGC and CFR User Guide PLEASE SEE THE LAST PAGE FOR AN IMPORTANT WARNING AND LEGAL TERMS AND CONDITIONS Rev PrA Page 1 of 82 SCOPE This user guide is the preliminary documentation to explain ADRV9029 s DPD CLGC and CFR capability This document is going to be merged to ADRV9029 user guide Please refer to ADRV9029 user guide once available thru ADI website ...

Page 2: ...y Metrics Characterization 34 DPD Characterization for optimizing M Threshold 37 Typical Procedure to Set Up DPD Using GUI 38 Crest Factor Reduction CFR 42 CFR Algorithm Overview 43 Overview of Blocks used in CFR 44 API Software Integration 45 Typical Procedure to set up CFR Using the GUI 53 Closed Loop Gain Control CLGC 60 CLGC Overview 60 Elements Of CLGC 60 CLGC Algorithm Overview 61 Enable The...

Page 3: ...CFR These functions are collectively grouped together as the transceiver digital front end DFE Figure 1 is a simplified system level overview of the transceiver signal chain with DFE processing blocks highlighted There are five main DFE processing blocks 1 CFR and hard clipper are used to reduce peak to average power ratio PAPR of the baseband signal especially for multi carrier waveforms such as ...

Page 4: ...rse of the PA model function to input samples before passing them to the transmitter output The cascade of the pre distorter response and the PA response becomes a nearly linear system PA 1 PA In Out Out Out In In Figure 2 Concept of Digital Pre Distortion for Linearizing the PA Response The intermodulation distortion products between various subcarriers due to PA non linearities in a wideband tra...

Page 5: ...ion Datapath The DPD algorithm relies on observing the non linearities via a feedback path The feedback path is realized using an integrated observation receiver ORx The PA output data is sampled through the observation receiver down converted and digitized for further analysis by the firmware DPD Processing The DPD engine is based on an abbreviated implementation of generalized memory polynomial ...

Page 6: ... half band filter provides either 1 or 2 interpolation rate A maximum of 4 interpolation can be achieved by cascading two DPD HB filters DPD half band 1 supports a bandwidth of approximately 82 with respect to input data rate For example DPD HB1 supports a 100 MHz Bandwidth signal at a 122 88 MSPS input rate DPD half band 2 supports a bandwidth of approximately 41 with respect to input data rate F...

Page 7: ...nableDirectLearning DPD Learning Mechanism Selected 0 Indirect Learning 1 Direct Learning Indirect Learning Indirect learning involves using the observation receiver data PA output data as a reference for predicting the input samples corresponding to the reference The function used for predicting the input samples is known as the inverse PA model Once the prediction of input samples corresponding ...

Page 8: ... approximation as described in matrix multiplication equations 1 to 3 Y F x C FH Y FH F C FH F 1 FH Y C Auto correlation Cross correlation 1 2 3 Multiply by complex conjugate of F on both sides Take the inverse of the auto correlation function to obtain C DPD Direct Learning DPD direct learning involves using the pre DPD actuator Tx signal U as reference to minimize the error between the observed ...

Page 9: ...ber of samples to 16384 which provides a good balance between estimation time and sample size The DPD algorithm runs on a dedicated ARM processor ARM D and calculates the coefficients corresponding to GMP terms of the inverse PA model This model pre distorts the digital baseband signal before digital to analog conversion and transmission of samples to the transmitter upconverter this output become...

Page 10: ...e of i and j are labeled per LUT Each row shares the same multiplier therefore the same j value Roaming LUTs A B C and D are assigned to top or bottom half of the table Figure 12 GMP Mapping to DPD Actuator LUTs There are a few restrictions placed on the GMP terms mapped to the LUTs shown in Figure 12 More LUTs are available for smaller i j values clustered at the top of the LUT banks compared to ...

Page 11: ...ues to load the structure adi_adrv9025_DpdModelConfig_t for the example in Figure 13 is shown below adi_adrv9025_DpdModelConfig_t dpdNumFeatures 8 adi_adrv9025_DpdModelConfig_t dpdFeatures 0 i 2 adi_adrv9025_DpdModelConfig_t dpdFeatures 0 j 1 adi_adrv9025_DpdModelConfig_t dpdFeatures 0 k 2 adi_adrv9025_DpdModelConfig_t dpdFeatures 0 lut ADI_ADRV9025_DPD_LUT10 adi_adrv9025_DpdModelConfig_t dpdFeatu...

Page 12: ...estore option must be exercised consecutively on all four channels to program the coefficients into the DPD actuator hardware adi_adrv9025_DpdModelConfigSet adi_adrv9025_DpdReset ADI_ADRV9025_TX1 ADI_ADRV9025_DPD_LUT_RESTORE adi_adrv9025_DpdReset ADI_ADRV9025_TX2 ADI_ADRV9025_DPD_LUT_RESTORE adi_adrv9025_DpdReset ADI_ADRV9025_TX3 ADI_ADRV9025_DPD_LUT_RESTORE adi_drv9025_DpdReset ADI_ADRV9025_TX4 A...

Page 13: ...r transmit channel is shown below The factory calibrated coefficients can be programmed into the transceiver through the API adi_adrv9025_DpdModelConfigSet for the two pairs of transmit channels as described in the previous section The DPD reset with the LUT restore option must be exercised for each channel adi_adrv9025_DpdModelConfigSet Load model for Tx1 adi_adrv9025_DpdReset ADI_ADRV9025_TX1 AD...

Page 14: ... since the high power signal levels contain more useful information for deriving DPD coefficients The device s calibration scheduler can initiate DPD capture at any available point in time when the transmit signal chain is enabled The sequence of events involved in DPD sample capture process is shown in Figure 17 Figure 17 DPD Tracking Calibration Sample Capture Sequence Peak Search Window and Pea...

Page 15: ...tem operation In order to do so the system designer must study the worst case signal statistics This DPD contains only one adaptation engine so the capture mechanism is shared between all active channels Figure 18 DPD Peak Detection Based Sample Capture Process for DPD Adaptation ...

Page 16: ...1 P2 P3 and P4 respectively are captured over four TDD downlink slot periods four Tx ON periods If each Tx ON period consists of M samples at the DPD actuator rate then the maximum peak search window size that can be configured using adi_adrv9025_DpdTrackingConfig_t dpdPeakSearchWindowSize is restricted to M 4096 samples At the end of four TDD downlink slot periods a composite capture data consist...

Page 17: ...e period U Table Unity Gain Table ADI_ADRV9025_DPD_MODEL_TABLE_U Unity gain model in which output is equal to input This model is usually activated in low power conditions where pre distortion is not necessary DPD Modes of Operation The DPD functionality supports three modes of operation that are listed in Table 3 The user can select one of the three modes based on the application The DPD engine n...

Page 18: ...updates in Mode 1 The DPD algorithm updates coefficients only when the RMS power measured by the DPD during the update exceeds the previously recorded maximum power In this example there is no update b w Update 1 and Update 2 because the RMS power is below the max power recorded Figure 21 DPD Mode 1 Update Example DPD Mode 1 offers the best mitigation of transient emissions when the signal changes...

Page 19: ...onditions Transmitter Low Power Threshold The DPD continuously integrates the baseband power level at the input of the DPD actuator so that it can switch between the different models described in Table 3 The power is measured for a period of 10 ms through a leaky integrator that runs continuously in the background If the 10 ms integrated rms power of the DPD input samples is below the transmitter ...

Page 20: ...M Table C Table that the DPD tracking calibration maintains and updates The DPD model update mechanism in DPD mode 2 operation is described in Table 4 Note that the switching mechanism between the models M Table high power C Table low power and U Table unity gain is based on the 10 ms integrated rms power of the DPD actuator input samples similar to the mechanism described in DPD Characterization ...

Page 21: ...gConfig_t minAvgSignalLevel DPD captured Tx samples adi_adrv9025_DpdTrackingC onfig_t minAvgSignalLevel DPD captured Orx samples adi_adrv9025_DpdTrackingConfig_t minAvgSig nalLevelOrx DPD Update applied to M Table in DPD Mode 0 and Mode 1 DPD Update applied to C Table M Table depending on adi_adrv9025_DpdTrackingConfig_t d pdMThreshold in DPD mode 2 No DPD update applied DPD captured Orx samples a...

Page 22: ...or indirect learning and direct learning mechanisms configured via the adi_adrv9025_DpdTrackingConfigSet API DPD Regularization in DPD Mode 2 For DPD Mode 2 operation where separate pre distortion coefficients are maintained for low power C Table and high power M Table data a separate regularization value can also be applied to low power C Table and high power M Table models This is typically inte...

Page 23: ...asure transmit capture power if power threshold abandon adaptation Calculation of Metrics After estimation of the DPD coefficients the error between the predicted and measured predistortion is computed to determine the expected DPD performance Detection of a large error prevents application of bad coefficients can be calculated using the following equation where is a vector of Tx samples after DPD...

Page 24: ...dRecoveryActionSet Table 7 ADRV902x Recovery Action Bit mask Definition Action Index Description Action Word recoveryAction_0 Abandon update bit 0 recoveryAction_1 Revert all LUTs to unity bit 1 recoveryAction_2 Reset DPD adaptation state internal adaptation statistics say bit 2 recoveryAction_3 HW reset actuator bit 3 recoveryAction_4 Switch to the maxPower model bit 4 recoveryAction_5 Switch to ...

Page 25: ...n Take no action Take no action Take no action Post DPD Capture Tx to ORx EVM Indirect EVM Take no action Take no action Take no action Take no action Indirect Error Abandon DPD LUT Update Abandon DPD LUT Update Revert LUTs to unity Reset DPD adaptation state HW reset DPD actuator Take no action Take no action Select Error Abandon DPD LUT Update Abandon DPD LUT Update Revert LUTs to unity Reset DP...

Page 26: ...nder range Gain over range can occur when DPD is trying to expand gain to compensate for gain compression A gain under range condition can occur due to bad coefficients or gain compression Gain can be monitored either sample by sample or averaged over a number of samples The maximum number of samples that can be averaged is 128k samples 266 µs worth of samples at a 491 52 MSPS rate The average gai...

Page 27: ...r range detection adi_adrv9025_DpdActGainMonitorCtrl_t Configuration to explicitly enable disable low gain under range detection adi_adrv9025_DpdActGainMonitorThresh_t dpdGainMonitorUpperThresh High gain threshold above which a model switch can be initiated by the gain monitoring hardware Only applicable if gain overrange detection is enabled adi_adrv9025_DpdActGainMonitorThresh_t dpdGainMonitorLo...

Page 28: ...unction takes in as argument a pointer to the device data structure and a pointer to a structure of type adi_adrv9025_DpdActGainMonitorConfig_t which contains configurations shown in Table 10 adi_adrv9025_DpdActuatorGainMonitorConfigGet This function returns the DPD gain monitor configuration applied in the device for the requested Tx channel An example python script to setup the gain monitor with...

Page 29: ...Preliminary Technical Data Rev PrA Page 29 of 82 Figure 30 Example Python Script to Configure Gain Monitoring Feature ...

Page 30: ...ns independently from the DPD actuator It monitors the gain of the signal across the actuator until it is turned off as shown in the state diagram Start Sample Capture for DPD Adaptation Coeff Generation and LUT Update Set M C Table as active model DPD Update Conditions Met DPD Scheduled Gain threshold violation Model Switch to unity gain R Table YES Other Cals FW Scheduling Timer NO NO NO YES YES...

Page 31: ...ypass through GPIO The GPIO control for DPD actuator bypass is managed by the stream processor in the transceiver This feature can be enabled through the following steps 1 Configure the stream to associate a GPIO with DPD actuator bypass control and generate a stream binary The transceiver evaluation software can be used to configure the GPIO for DPD actuator bypass and generate the stream binary ...

Page 32: ...ode adi_adrv9025_DpdError_e DPD error status Please refer to the file adi_adrv9025_dfe_types h for a full list of DPD error codes returned by the DPD status If the DPD is functioning correctly this parameter should return ADI_ADRV9025_DPD_NO_ERROR dpdPercentComplete UInt32 Percentage of DPD update completed dpdIterCount UInt32 No of DPD updates scheduled dpdUpdateCount UInt32 No of successful DPD ...

Page 33: ...drv9025_ClgcExternalPathDelaySet 5 Run the Tx external LO Leakage initial calibration adi_adrv9025_InitCalsRun 6 If using ADRV9025 CFR configure the CFR settings adi_adrv9025_CfrConfigSet adi_adrv9025_CfrEnableSet adi_adrv9025_CfrCorrectionPulseWrite_v2 7 If using ADRV9025 CFR run the CFR initial calibration adi_adrv9025_InitCalsRun 8 Load the DPD model adi_adrv9025_DpdModelConfigSet 9 Assert DPD ...

Page 34: ...eater than 30 dBFS All the above metrics are user configurable The following section provides characterization data which might provide some guidance regarding factors that could influence the configuration of the stability metrics defined Measuring DPD Adaptation Performance through Direct EVM and Indirect Error Shown below are three cases where the stability metrics direct EVM and indirect Error...

Page 35: ...uation vs Stability Metrics Observation Receiver Interference Although unlikely any interference in the observation receiver channel can cause DPD instability and can cause the firmware to derive wrong DPD coefficients resulting in poor performance as shown below in Figure 39 which includes the bench characterization of observation receiver interference levels affecting ACLR and stability metrics ...

Page 36: ...l is close to 36 dBFS it can be observed that the EVM percentages are close to 5 At a transmitter signal level close to 46 dBFS the EVM percentages are close to 15 causing further ACLR degradation Figure 40 Tx Signal Level vs ACLR Degradation Summary DPD performance can be measured by direct EVM The direct EVM numbers are lower when the performance on the DPD adaptation is good As ORx attenuation ...

Page 37: ... characterize the system under test for EVM corruption that is specific to the system or conditions prevalent before configuring the thresholds DPD CHARACTERIZATION FOR OPTIMIZING M THRESHOLD A DPD characterization test for optimizing M Table threshold in DPD Mode 2 includes the following steps 1 Bring up DPD with a full power full bandwidth signal for example TM3 1a at 14 dBFS and 100 MHz BW 2 On...

Page 38: ... programmed using one of the DPD profiles where either one or both of the DPD half band HB are enabled Usecase 51 is shown in Figure 43 While programming the device the PA must be turned off to avoid any damage from high amplitude signals transmitted during initial calibration The user must ensure the Tx to ORx mapping is correct and ORx LO is configured to use Tx LO Once initialization is complet...

Page 39: ... or too close to the noise floor using the Obs Rx tab ORx gain can be adjusted to get appropriate signal levels On the DFE tab there is a specific sub tab for DPD DPD sub tab allows the user to fully configure and observe DPD The ACLR measurement window is not available at this point play button is not functional and is not used to enable any DPD feature The following steps outline the sequence to...

Page 40: ...odel on Device from C Table buttons See Figure 48 7 Click Enable DPD on selected channels only to enable DPD Tracking Figure 48 Apply DPD Settings 8 DPD status and statistics can be revealed by using Get Status and Statistics for the respective Tx channel See Figure 49 9 Reset DPD button in Figure 49 appies a full reset to DPD 10 From the functional window in Figure 49 user can fetch the model on ...

Page 41: ...PD to apply a Full Reset 3 Load model file from PC model files are provided by ADI Make sure Real Coeff of the linear term i 1 j 1 k 0 is set to 1 4 Configure DPD Tracking Config parameters 5 Select desired Tx channel to apply settings on Figure 48 6 Apply DPD tracking configuration by clicking on Apply Tracking Config as shown in Figure 48 7 Apply DPD model on the M or C tables using Apply Model ...

Page 42: ...highly desirable to drive the PA at the highest input power possible without having the PA saturate Most modern communications protocols such as Long Term Evolution LTE are Orthogonal Frequency Division Multiplexing OFDM based in which the final waveform is an orthogonal summation of subcarriers that carry information and where each subcarrier has its own center frequency and modulation scheme In ...

Page 43: ...t is important to optimize the CFR algorithm to make sure that the CFR block s impact is within the customer s system level specifications derived from 3GPP specifications or other regulatory standards CFR ALGORITHM OVERVIEW Several CFR algorithms and implementations exist in the literature only a few have been commercially viable Clipping and filtering and pulse cancellation are two of the more p...

Page 44: ...t missed peaks as well as peaks that need further correction after passing through the first engine The CFR block within the transceiver consists of three cascaded CFR engines followed by a hard clipper to clip the few peaks that are skipped by all three CFR engines At the output of each engine there exists a mux that can be programmed to bypass CFR or apply correction shown in Figure 54 Error Obj...

Page 45: ...d to cancel the peak These weights and peak location values are then used to scale and time shift the spectrally shaped pulses and generate the correction pulse This correction pulse is then subtracted from the transmitter input data to generate the output signal with a low PAR Pulse RAM The pulse RAM holds the correction pulse for the carrier It is possible to load two correction pulses correspon...

Page 46: ...iguration before executing the CFR init cal Currently ADI_ADRV9010_CFR_MODE1 is the only mode of operation supported by the CFR engine The user is expected to provide the final correction pulse to be applied to the CFR input in this mode The threshold is calculated using the following equation The user can setup an interpolation factor of 1 2 or 4 to be applied to the transmitter data before peak ...

Page 47: ...e to enable better peak detection uint8_t cfrEngine1MaxNumOfPeaks 0 5 Sets the maximum number of peaks to remove in one group for the respective CFR engines Default value is 5 User needs to set this to 0 when engine is disabled It s suggested to have descending order of max number of peaks where Engine1 has the highest value uint8_t cfrEngine2MaxNumOfPeaks 0 5 uint8_t cfrEngine3MaxNumOfPeaks 0 5 a...

Page 48: ...swapping cfrCorrectionPulses 0 corresponds to ADI_ADRV9025_CFR_CARRIER_HOT_SWAP_CORR_PULSE_1 and cfrCorrectionPulses 1 corresponds to ADI_ADRV9025_CFR_CARRIER_HOT_SWAP_CORR_PULSE_2 numCorrectionPulses Number of correction pulse coefficients to be programmed in the CFR engine Please note that a maximum of two correction pulses can be programmed if the half pulse length of the 2 correction pulses ar...

Page 49: ...mitter datapath The CFR control config settings can be applied via adi_adrv9025_CfrCtrlConfigSet To apply CFR correction to transmitter data the user can set adi_adrv9025_CfrEnable_t cfrEngineXEnable to 1 and adi_adrv9025_CfrEnable_t cfrEngineXBypassEnable to 0 To bypass CFR engine the user can set adi_adrv9025_CfrEnable_t cfrEngineXEnable to 1 and adi_adrv9025_CfrEnable_t cfrEngineXBypassEnable t...

Page 50: ... be setup before running the CFR init cal There is no support for dynamically changing the hard clipper threshold during runtime Table 23 adi_adrv9025_ CfrHardClipperConfigSet Parameters Parameter Description device Pointer to the device settings structure cfrHardClipperConfig An array consisting of the CFR hard clipper configurations cfrHardClipperCfgArraySize Number of configurations in cfrHardC...

Page 51: ...curred along with the statistics information which includes the number of peaks skipped number of peaks detected and the number of peaks clipped by each CFR engine The user can also monitor the CFR status to retrieve errors encountered during CFR init cal execution The CFR statistics can be retrieved using this function Precondition This function may be called any time after device initialization ...

Page 52: ...n This function switches the final correction pulse to be applied in the CFR engine in Mode 1 ADI_ADRV9025_CFR_MODE1 operation This function can be used to activate one of the two final correction pulses corresponding to two carrier configurations when the active carrier configuration is changed during runtime carrier configuration hot swapping This function can only be executed if 2 correction pu...

Page 53: ...25_CfrCarrierHotSwapCorrPulseSel_e cfrCorrectionPulseSel Description This function returns the correction pulse currently activated in the CFR engine in Mode 1 ADI_ADRV9025_CFR_MODE1 operation This function can be used to retrieve the status of the correction pulse currently activated in the device By default the device activates ADI_ADRV9025_CFR_CARRIER_HOT_SWAP_CORR_PULSE_1 on reset Precondition...

Page 54: ...e waveform it is transmitted using the Play button on the transmit tab As an example an LTE 20 MHz waveform with PAR of 12 2dB is used here The uncorrected waveform s Complementary Cumulative Distribution Function CCDF is shown in Figure 56 Figure 56 CCDF of an Example 20 MHz LTE Signal with PAR of 12 2 dB Uncorrected Waveform ...

Page 55: ...0 MHz in example shown and is sampled at the peak detection rate We have set the CFR Peak threshold to 0 47 which would correspond to a target PAR calculated using the following equation Using the equation above the target PAR is around 8 75 dB On the other hand if the user wants to derive the CFR peak threshold value needed for achieving a desired target PAR they can use the equation The user wou...

Page 56: ...be enabled and the corrected waveform can be observed on the spectrum analyzer as shown in Figure 59 Figure 59 CCDF of Corrected Waveform Ssing CFR As we can see in Figure 59 the corrected CCDF curve has a PAR of 8 75 dB which corresponds to the CFR peak threshold that we had set earlier We do not see any spectral regrowth and can achieve the desired PAR ...

Page 57: ...7 dB as used in the section above is used here as an example The set up information for this waveform is described below Setup Carrier 1 Center Frequency 0 MHz Output Sample Rate 245 76 MHz DAC Resolution 16 Output Data Format 2s Complement Scaling 0 dB Modulation 64QAM Test model 3 1 Final PAR dB 12 2 The EVM observed before applying CFR is shown in Figure 60 Figure 60 Observed EVM Before Applyin...

Page 58: ...degraded from 0 6 to 2 due to application of CFR From a quick sweep of the rms EVM at different target PAR we see the trend shown in Figure 62 Note that different systems have different requirements for maximum tolerable EVM degradation due to CFR which would drive the minimum achievable PAR for a given waveform configuration Note also that the performance shown here is highly dependent on the goo...

Page 59: ...Preliminary Technical Data Rev PrA Page 59 of 82 Figure 62 Target PAR vs EVM ...

Page 60: ...mains constant Interpolation 1 2 4 Tx PA FILTER DUPLEXER ORx ARM C Data From CFR ADRV9025 CLGC Firmware DPD Actuator Tx FE Attenuation Tx Atten Control x n y n Capture Engine Figure 63 ADRV9025 CLGC Simplified Block Diagram The elements of the CLGC system are described below Transmit Datapath The digital baseband signal from the ADRV9025 de framer output goes through a Crest Factor Reduction CFR b...

Page 61: ...e divided into 4 sections listed below The total loop gain observed at the observation receiver ORx includes the front end attenuation out of the transceiver gain of the power amplifier coupling attenuation for feedback and the observation receiver ORx front end attenuation Table 33 Observed data for loop gain estimation Section Gain Equation Comments Tx Section Xtx n gTX x n vtx_DAC_Quant n gTX T...

Page 62: ...00000000100000 Enable CLGC tracking cal on Tx1 ADI_ADRV9025_TRACK_TX2_CLGC 0x0000000000200000 Enable CLGC tracking cal on Tx2 ADI_ADRV9025_TRACK_TX3_CLGC 0x0000000004000000 Enable CLGC tracking cal on Tx3 ADI_ADRV9025_TRACK_TX4_CLGC 0x0000000008000000 Enable CLGC tracking cal on Tx4 There are at least three pre requisites for enabling the CLGC tracking calibration 1 The correct Tx to ORx mapping i...

Page 63: ...gorithm simply measures the loop gain without actively adjusting the Tx front end attenuation Once the ideal operating point is determined the user can then enable active loop gain control mode 2 Active Loop Gain Control In this mode the CLGC measures the loop gain from ORx to Tx baseband and adjusts the Tx front end gain to maintain the loop gain This mode of operation is typically activated duri...

Page 64: ...Preliminary Technical Data Rev PrA Page 64 of 82 Figure 65 CLGC modes of operation during bring up ...

Page 65: ...Time_us Maximum No of batches The CLGC measurement continues to capture samples in batches until the required SNR criteria is met OR the no of batches exceeds 512 If the no of batches captured exceeds 512 and the requisite SNR criteria is not met then an error is flagged and the CLGC aborts calibration Fixed value of 512 not user configurable Tx Qualifying Threshold If the captured Tx samples are ...

Page 66: ...ured in Figure 5 The flowchart explains the measurement and it s interactions with the measurement parameters described in Table 4 The important thing to note is that the CLGC only captures samples until the Tx ORx threshold and the ORx SNR criteria is met Once the threshold and SNR criteria is met the CLGC proceeds to measuring the loop gain and doesn t capture any further samples ...

Page 67: ...lgcConfigSet The Tx attenuation control parameters that a user needs to configure are described in Table 5 Table 38 Tx attenuation control user configuration Parameter Description User Configuration Access Minimum Tx Attenuation The absolute value of the lower limit of Tx attenuation configured in dB Eg If the lower Tx attenuation limit is configured as 3dB then the CLGC algorithm cannot adjust th...

Page 68: ...esolution of 0 05dB adi_adrv9025_ClgcConfig_t clgcMaxGainAdjustmentStepSize_dB The Tx gain adjustment step size is a trade off between the time required to converge versus transient spectral emissions due A smaller Tx gain adjustment step results in smaller transient emissions but takes a longer time to converge A large step size could result in transient emissions due to a large change in power b...

Page 69: ...Preliminary Technical Data Rev PrA Page 69 of 82 Figure 69 CLGC Active Loop Gain Control update cycle ...

Page 70: ...mples 10us to 65536us clgcExpectedLoopGain_dB Configured by the user depending on the optimum operating point of the PA No limits imposed the expected loop gain depends on the application clgcTxQualifyingThreshold_dBFS Minimum threshold for the Tx signal required to run CLGC tracking The qualifying threshold must not go below 70 dBFS for optimum performance clgcOrxQualifyingThreshold_dBFS Minimum ...

Page 71: ...and clgcCaputreStatus members of structure adi_adrv9025_ClgcStatus_t Table 42 captures the CLGC runtime errors clgcState and the recommend user actions Table 43 captures the CLGC capture errors clgcCaputreStatus Table 42 CLGC Runtime Errors ClgcState Error Enum Description Recommended Recovery Actions ADI_ADRV9025_CLGC_INITIAL_ RUN CLGC algorithm is still in initialization state This runtime state...

Page 72: ... CLGC will re initialize No action expected from the user If the CLGC does not recover from this state please examine the Orx qualifying threshold ADI_ADRV9025_CLGC_USER_C HANGE_TX_ATTEN A Tx attenuation change from the user has been detected and CLGC will re initialize No action expected from the user If the CLGC does not recover from this state please examine the Tx qualifying threshold ADI_ADRV...

Page 73: ...annel was not successfully released after a CLGC capture Disable CLGC Verify that other cals are still running If other cals are still running then it might require a full firmware reset ADI_ADRV9025_CLGC_CAP_DONE_ERR CLGC capture aborted due to error This could be due to other errors in the system Examine that other parts of the system are operating correctly Might require a full firmware reset i...

Page 74: ...e CFR settings adi_adrv9025_CfrConfigSet adi_adrv9025_CfrEnableSet adi_adrv9025_CfrCorrectionPulseWrite_v2 7 If using ADRV9025 CFR run the CFR initial calibration adi_adrv9025_InitCalsRun 8 Load the DPD model adi_adrv9025_DpdModelConfigSet 9 Assert DPD Reset adi_adrv9025_DpdReset 10 Setup DPD mode of operation DPD peak search window size and low power threshold adi_adrv9025_DpdTrackingConfigSet 11...

Page 75: ...5GNR signal under test is shown in Figure 71 The signal has majority of the resource blocks allocated to PDCCH Downlink Control Information and PDSCH_DMRS reference symbols that are QPSK modulated There are 48 resource blocks RBs allocated to Downlink Control Information PDCCH data The UE performs blind decoding for synchronization with the help of PDCCH symbols There are at least 48 resource bloc...

Page 76: ...ctrum and one sub carrier in the middle of the 100Mhz bandwidth The sub carrier spacing is 30KHz Figure 72 Frequency Domain Spectrum of the sub carriers Time Domain Analysis of the Signal Shown below is a time domain view of the signal zoomed in for 860us In Figure 10 the time has been further subdivided into 4 timing intervals T1 T2 T3 T4 during which different resource blocks are active and ther...

Page 77: ...n band n41 operation 2 5 2 7GHz It can be observed that the carrier at 2 69GHz experiences a gain of less than 1dB compared to the carrier at 2 49GHz at lower powers and a gain of less than 2dB at higher power levels Figure 74 SKY66397 Gain vs Pout over Frequency of a CW tone The forward gain S21 of the PA vs frequency is shown in Figure 75 The operating range of this PA is 2 5 2 7GHz It can be ob...

Page 78: ...CLGC loop gain estimation A more detailed flow of measurement can be found in CLGC Measurement section The CLGC algorithm captures Tx and ORx data in batches If the captured data meets the required threshold and SNR criteria the CLGC algorithm proceeds to estimate the loop gain and apply the Tx attenuation correction Figure 76 Simplified flow diagram of CLGC data sampling ...

Page 79: ...n of the frequency content is captured in section 2 3 2 PA Characteristics The PA gain over frequency is not constant as captured in the PA Characteristics section Given the signal under test has sub carriers separated by 50MHz and they are all not active in the same symbol period the gain estimated depends on the symbols captured by the ORx 3 CLGC Sampling Period As noted by the signal characteri...

Page 80: ... of symbols carrying DMRS and up to 4 Bandwidth parts in a single carrier bandwidth Given the different combinations and frequencies of reference symbols a good approach to determine the CLGC sampling period could be to carry out a statistical analysis of the signal which can be considered a tough case and use that as a starting point for the CLGC sampling period A signal such as TM2 used in this ...

Page 81: ...d 1000us is shown below The standard deviation decreases and convergence towards expected value increases as the averaging duration increases for the signal under test Figure 80 Distribution of moving avg 10us 100us Figure 81 Moving average distribution with duration 1ms The Cumulative Distribution Function of the waveform for different averaging durations Figure 80 also provides an insight into a...

Page 82: ...evices subjected to high energy ESD Therefore proper ESD precautions should be taken to avoid performance degradation or loss of functionality Legal Terms and Conditions Information furnished by Analog Devices is believed to be accurate and reliable However no responsibility is assumed by Analog Devices for its use nor for any infringements of patents or other rights of third parties that may resu...

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