ADP1872-EVALZ/ADP1873-EVALZ User Guide
UG-057
Rev. A | Page 3 of 20
EVALUATION BOARD HARDWARE
Upon receipt of the
ADP1872
/
ADP1873
evaluation board, the
following criteria have already been determined:
•
The IC is either the
ADP1872
(forced pulse-width modulation
[PWM]) or the
ADP1873
(power saving mode [PSM]).
•
The switching frequency is 300 kHz, 600 kHz, or 1 MHz.
SETTING UP THE EVALUATION BOARD
Before powering up the system, set up the evaluation board as
follows to ensure that all passive and active components are
properly soldered to the evaluation board:
1.
Ensure that the Headers JP2 and J1 connections are correct
for a given application (see Table 1 and the Headers JP2
and J1 section).
2.
Ensure that the main power supply (V
IN
) is off but set to 0 V,
and then connect the main power supply to the evaluation
board, connecting the positive terminal to TP_VIN1 and
the negative terminal to TP_PGND.
3.
Optionally, place a current meter in series with the main
power supply to monitor the input current.
4.
Ensure that the low input voltage supply (V
DD
) is off but set
to 0 V, and then connect the low input voltage supply to the
evaluation board, connecting the positive terminal to J1
and the negative terminal to TP_PGND.
5.
Ensure that the electronic load is turned off, and then connect
the load to the evaluation board, connecting the positive
terminal to TP_VOUT1 and the negative terminal to
TP_PGND.
6.
Optionally, connect a power resistor of the appropriate
value for your application across the TP_VOUT1 and
TP_PGND terminals of the evaluation board.
7.
Optionally, to continually monitor V
IN
, V
DD
, and V
OUT
, solder
SMB jacks to each of the following measuring points: VIN1,
VOUT1, and VREG1 (see Figure 33).
Table 1. Header Connections
Header
Input Voltage (V)
Description of Connection
J1
≤5.5
Floating (no jumper), single
input configuration.
>5.5
Connect to V
DD
(dual input
configuration), and, optionally,
add a voltmeter across J1 and
TP_PGND to monitor the low
input voltage.
JP2
≤5.5
Jumper between V
IN
and V
DD
(single input configuration).
>5.5
Open (no jumper), dual input
configuration.
JP3
N/A
Jumper at all times.
Headers JP2 and J1
When the power input voltage is greater than 5.5 V, the device
is in dual input configuration. If this configuration is chosen,
ensure that Header JP2 is open (no jumper), and connect J1 to
V
DD
. Optionally, you can also add a voltmeter across J1 and
TP_PGND to monitor the low input voltage.
If the power input voltage is less than or equal to 5.5 V, the device is
in single input configuration. In this case, a jumper can be placed
on Header JP2 that connects V
IN
to V
DD
. If a jumper is used in
this way, leave Header J1 floating (no jumper), and ensure that
V
IN
does not exceed 5.5 V.
Header JP3
Always put a jumper on Header JP3 to connect the high voltage
input to Pin 1 (VIN) of the IC.
High Input Voltage Power Source (V
IN
)
Ensure that the main power supply equipment is turned off but set
to 0 V before connecting the main power supply to the evaluation
board. Place a current meter in series with this power supply to
monitor the input current. Connect the positive terminal (+) of
the power supply to the TP_VIN1 terminal of the evaluation board.
Connect the negative terminal of the power supply (−) to the
TP_PGND terminal of the evaluation board.
Low Input Voltage Supply for Bias (V
DD
)
Set the low input voltage supply to 0 V and make sure that it is
turned off before connecting the positive terminal (+) to Jumper J1
of the evaluation board. Connect the negative terminal (−) to
the TP_PGND terminal of the evaluation board.
Output Terminal
The output terminal (TP_VOUT1) of the
ADP1872
/
ADP1873
evaluation board is equipped with a banana terminal plug similar
to TP_VIN1 and TP_PGND. The evaluation board is designed to
withstand load immediately upon power-up, but may be damaged
if the load is not properly connected to TP_VOUT1. Ensure that
the electronic load is turned off prior to connecting the positive
terminal (+) and negative terminal (−) to the V
OUT
and TP_PGND
terminals of the evaluation board, respectively. If a power resistor is
used, connect this device across the TP_VOUT1 and TP_PGND
terminals of the evaluation board.
Ensure that proper current values for your application are
programmed on the electronic load prior to activation and, if
applicable, that the correct power resistor value for your application
is in place before powering up the evaluation board.
DC Voltmeter on V
IN
, V
DD
, and V
OUT
For more accurate dc measurements of V
IN
, V
DD
, and V
OUT
, add
a dedicated voltmeter for each of these voltage nodes (resources
permitting) to continually monitor V
IN
, V
OUT
, and V
DD
. This can
be done by placing an SMB jack on VIN1, VOUT2, VREG1 (see
Figure 33).
