ADAV4601 System Design Document
Confidential Information
Rev.1 August 2009
Analog Devices
Page 37
ADAV4601 SELF BOOT
If a custom flow has been designed, it can be stored on an external EEPROM. The ADAV4601 features a self boot
option which allows the part to copy ROMS from an EEPROM to its own internal memory. In this way, the user can
develop their own custom flows and have them loaded to the ADAV4601 on start up. During the transfer, the
ADAV4601 is in master mode, meaning it controls the I2C bus. It controls the copying of the ROMS, easing the load
on the microcontroller. During the transfer, it is important nothing else accesses the I2C bus, or conflicts can occur.
Once it has completed, the ADAV4601 releases the I2C bus, and becomes a slave again. The time to transfer the
ROMS is approximately 1.2sec.
Boot Sequence
1.
MCU Powers up the ADAV4601 (Reg 0000h, bit 0) and enables the DSP (Reg 0000h, bit 1) with outputs
muted via I2C.
2.
MCU writes to ADAX4xyz to enable EEPROM booting via I2C.
3.
After 2.5 us time the ADAV4601 will become an I2C master and start reading the EEPROM contents.
4.
After 1.16 s the ADAV4601 will be finished booting and release I2C bus, The ADAV4601 is now an I2C slave
device.
5.
MCU will unmute the ADAV4601 outputs via I2C: ~ 7 ms
6.
MCU can continue configuring the rest of the system via I2C.
Note: In order to successfully copy the data from the EEPROM, the ADAV4601 must be powered up and the DSP
enabled.
Enabling EEPROM Booting
1.
Register 0316h contains the EEPROM chip address. It is set to a default of 0x50. This register must be
programmed with the correct EEPROM address.
2.
Register 0317h contains the EEPROM start address. It is set to a default of 0x0000. This register must be
programmed with the correct EEPROM start address.
3.
Register 0200h bit 16 is the Enable Self booting from an external EEPROM bit. Once this bit is set to 1, the
Self booting process begins. The ADAV4601 becomes a master on the I2C bus and initiates the data
transfer.
EEPROM Data Structure
The following is the general data structure for the EEPROM.
Table 7. EEPROM Data Structure
Message Byte
Length
Length
Device Address
Address
Address
Data 1
Data 2
..
..
..
Data X
Message Byte
