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UG-076 

Evaluation Board User Guide

 

Rev. A | Page 12 of 16 

OUTPUT DRIVER WINDOW 

The output driver window shown in Figure 22 is accessed by 
clicking any of the numbered triangular output driver symbols 
on the right side of the main window (see Figure 21). 

0

8746-

026

 

Figure 21. Driver Symbol 

08

74

6-

0

17

 

Figure 22. Output Driver Window 

It is important to power down unused outputs on the evaluation 
board because they can be a major source of unwanted spurs. 

LVPECL and CMOS outputs have different termination require-
ments, and OUT9 through OUT11 have been terminated 
differently from OUT0 through OUT8. 

OUT0 through OUT8 are ac-coupled with 200 Ω pull-down 
resistors on each output. This termination scheme is ideal for 
LVPECL drivers. However, this scheme degrades the CMOS 
driver performance. Improved CMOS driver performance is 
achieved by removing the 200 Ω pull-down resistors. 

OUT9 though OUT11 have no termination resistors, and are 
ideally configured for CMOS operation. If the user wants to use 
these drivers in LVPECL mode, pull-down resistors must be 
added to the board. If the user wants to put 50 Ω termination at 
the SMA connectors of OUT9 through OUT11, add series 
decoupling capacitors so that the termination on OUT9 
through OUT11 is identical to OUT0 through OUT8. 

DEBUG WINDOW 

The 

Debug

 window shown in Figure 23 is accessed by clicking 

the 

Debug

 option from the 

View

 menu.  

The 

Serial I/O

 section of this window is a convenient way to 

read and write registers directly.  

087

46-

018

 

Figure 23. 

Debug

 Window 

 

Summary of Contents for AD9520-0

Page 1: ...are very low noise phase locked loop PLL clock synthesizers featuring an integrated voltage controlled oscillator VCO clock dividers and up to 24 outputs The AD9520 product series features automatic...

Page 2: ...D9520 on a User Board 15 AD9520 Binary File Generation 16 Checksum Generation 16 Avoiding Checksum Mismatches 16 REVISION HISTORY 5 2017 Rev 0 to Rev A Changes to Title and General Description Section...

Page 3: ...ng is recommended in applications requiring automatic hitless reference switching There is a possibility that the AD9520 receive buffer can chatter when an ac coupled clock stops toggling Connect an o...

Page 4: ...ing that the evaluation board was found or red text appears indicating that the evaluation board was not found 2 If the evaluation board is found click anywhere in the pop up window with the Evaluatio...

Page 5: ...p from the PLL MODE box found at the top of the main window see Figure 8 2 Enter the intended reference input frequency in megahertz in the REF 1 MHz box at the upper left corner of the main window 3...

Page 6: ...f the CHARGE PUMP box However this setting normally does not need to be modified 11 Set the VCO divider by clicking the green VCO box in the center of the main window immediately to the left of the Ca...

Page 7: ...are listed in the following sections and each of these subsections has its own window From the main window each functional block can be accessed by clicking that block in the main window When a subwi...

Page 8: ...N WINDOW The PLL Configuration window shown in Figure 11 is opened by clicking the Config PLL button on the main screen The window has three sections SyncB Counter Reset Mode PLL Status Registers and...

Page 9: ...ssed by clicking the EEPROM button near the lower left corner of the main window 08746 008 Figure 12 EEPROM Control Window To store the current register settings of the AD9520 to the EEPROM click the...

Page 10: ...der value For example it is not possible to use the internal VCO and a feedback divider of 30 However the R divider can be doubled which allows a feedback divider of 60 The feedback divider window has...

Page 11: ...king the Cal VCO button in the main window 08746 015 Figure 19 Calibrate VCO Window A valid reference input signal must be present to complete VCO calibration and the VCO must be recalibrated any time...

Page 12: ...istors on each output This termination scheme is ideal for LVPECL drivers However this scheme degrades the CMOS driver performance Improved CMOS driver performance is achieved by removing the 200 pull...

Page 13: ...ted evaluation board see Figure 25 08746 019 Figure 25 Select USB Device Window Configure Serial Port The I O Interface window allows the user to control how the USB controller interacts with the AD95...

Page 14: ...better choice Typical phase detector frequencies for these applications are 10 MHz to 100 MHz and typical loop bandwidths for this loop filter are 50 kHz to 500 kHz depending on the configuration The...

Page 15: ...and then click Detect Current Configuration A dialog box appears and acknowledges the I2 C mode and address The evaluation software starts at I2 C Address 0x058 and stops at the first valid I2 C addre...

Page 16: ...MA 02062 USA Subject to the terms and conditions of the Agreement ADI hereby grants to Customer a free limited personal temporary non exclusive non sublicensable non transferable license to use the Ev...

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