American Megatrends MegaRAC M300V, User Manual

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44 MegaRAC® M300V Card Implementer’s Reference and User’s Guide
OPMA Hardware Resources
The following sections describe the OPMA reserved hardware resources. The addressing scheme
for the devices described here is an 8-bit addressing scheme.
SEEPROM Address Reservation
Unless restricted, mCards could locate their SEL (System Event Log) and SDRR (Sensor Data
Record Repository) SEEPROMs on any OPMA I
2
C or SMBus and at any of the eight possible
SEEPROM device addresses (0–7). In order to simplify BMC firmware, OPMA reserves two
SEEPROM I
2
C or SMBus addresses for the SEL and the SDRR.
If such devices are to be used
,
mCard designers must locate SDR and SEL SEEPROM devices at SEEPROM I
2
C or SMBus
addresses A0h and A2h. In addition, these devices must be located on the OPMA-defined
MCARD_I2C_PRIVATE0 only.
The MegaRAC M300V cards using this scheme must select SEEPROM devices that can be
addressed at A0h and A2h locations. The A0h address is reserved for the SEL device and the A2h
address is reserved for the SDRR device. If a single SEEPROM device is selected for both the
SEL and SDRR, it can be located at address A0h. In such cases, address A2h is still reserved and
not utilized.
OPMA-compliant motherboards may locate SEEPROM devices that are outside of the OPMA
specification at any I
2
C or SMBus addresses on the MCARD_I2C_PRIVATE0 besides the
OPMA-reserved addresses of A0h and A2h. There are no SEEPROM device restrictions for any of
the four other OPMA-defined I
2
C or SMBus buses.