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Chapter Four : M300V Interface Signal Specifications
41
I
2
C or SMBus Signals
OPMA supports a total of five I
2
C or SMBus buses to allow the MegaRAC M300V card to
communicate with multiple I
2
C and SMBus devices in the system. The numbers of I
2
C or SMBus
interfaces supported by specific BMCs vary, but it is the responsibility of all mCards to ensure that
all of the I
2
C or SMBus pins on the OPMA connector are in some way connected to the BMC’s
I
2
C or SMBus controller(s).
Signal Group: I
2
C or SMBus
Signal Group
Signal Name
Signal Function
I/O
Signal
Termination on
MB*
I
2
C or SMBus
X 5
MCARD_I2C_IPMB_SCL I
2
C clock for the IPMB bus
I/O
4.7k PU to +3.3V
MCARD_I2C_IPMB_SDA I
2
C data for the IPMB bus
I/O
4.7k PU to +3.3V
MCARD_I2C_
SIDEBAND_NIC_SCL
I
2
C clock for the NIC sideband bus
I/O
4.7k PU to +3.3V
MCARD_I2C_
SIDEBAND_NIC_SDA
I
2
C data for the NIC sideband bus
I/O
4.7k PU to +3.3V
MCARD_I2C_
SIDEBAND_NIC_ALERT
Alert signal from the NIC for I
2
C traffic
I/O
4.7k PU to +3.3V
MCARD_I2C_PRIVATE0_SCL I
2
C clock for mCard private 0 I
2
C bus
I/O
4.7k PU to +3.3V
MCARD_I2C_PRIVATE0_
SDA
I
2
C data for mCard private 0 I
2
C bus
I/O
4.7k PU to +3.3V
MCARD_I2C_PRIVATE1_SCL I
2
C clock for mCard private 1 I
2
C bus
I/O
4.7k PU to +3.3V
MCARD_I2C_PRIVATE1_
SDA
I
2
C data for mCard private 1 I
2
C bus
I/O
4.7k PU to +3.3V
MCARD_I2C_SHARED_SCL
mCard shared host device I
2
C clock
I/O
4.7k PU to +3.3V
MCARD_I2C_SHARED_SDA
mCard shared host device I
2
C data
I/O
4.7k PU to +3.3V
•
mCard IPMB (MCARD_I2C_IPMB_SCL, MCARD_I2C_IPMB_SDA)
•
One bus (two signals) for Intelligent Platform Management Bus
•
mCard sideband NIC channel (MCARD_I2C_SIDEBAND_NIC_SCL,
MCARD_I2C_SIDEBAND_NIC_SDA)
•
One bus (two signals) through which the system NIC may send IPMI management traffic
to support a shared NIC configuration.
•
The additional MCARD_I2C_SIDEBAND_NIC_ALERT signal is required for NIC
devices that are not capable of multi-mastering. This signal is primarily used for alerting
the MegaRAC M300V card that packets are available.
•
mCard shared host I
2
C bus or SMBus (MCARD_I2C_SHARED_SCL,
MCARD_I2C_SHARED_SDA)
•
One bus (two signals) for communicating with devices that are on an I
2
C bus or SMBus
that another master is also connected to. The typical example is sharing an I
2
C bus with
the host chipset’s SMBus controller so that both the system and the BMC have direct
access to SMBus-based devices such as DRAM SPD (Serial Presence Detect).
•
If used in this configuration, the SMBus master devices (the host and the MegaRAC
M300V card) must conform to the multi-mastering protocol.
•
mCard private I
2
C or SMBus buses (MCARD_I2C_PRIVATE0_SCL,
MCARD_I2C_PRIVATE1_SCL, MCARD_I2C_PRIVATE0_SDA and
MCARD_I2C_PRIVATE1_SDA)
•
Two buses (four signals) for mCard private I
2
C or SMBus buses. The bulk of the I
2
C or
SMBus sensor devices that are monitored by the BMC should be placed on these buses.
Summary of Contents for MegaRAC M300V
Page 1: ...MegaRAC M300V Card Implementer s Reference and User s Guide MAN M300V 07 9 07 ...
Page 14: ...8 MegaRAC M300V Card Implementer s Reference and User s Guide ...
Page 16: ...10 MegaRAC M300V Card Implementer s Reference and User s Guide ...
Page 58: ...52 MegaRAC M300V Card Implementer s Reference and User s Guide ...
Page 62: ...56 MegaRAC M300V Card Implementer s Reference and User s Guide ...
Page 80: ...74 MegaRAC M300V Card Implementer s Reference and User s Guide ...
Page 87: ...Index 81 ...