AMD Confidential
User Manual
September 12
h
, 2008
216
Appendix A
Instruction
Supported
Mnemonic
Opcode
Description
SHL
reg/mem64
,
imm8
C1 /4
ib
Shift a 64-bit register or memory
location left the number of bits
specified by an 8-bit immediate
value.
SHLD
reg/mem16
,
reg16
,
imm8
0F A4 /r
ib
Shift bits of a 16-bit destination
register or memory operand to the
left the number of bits specified in
an 8-bit immediate value, while
shifting in bits from the second
operand.
SHLD
reg/mem16
,
reg16
,CL
0F A5 /r
Shift bits of a 16-bit destination
register or memory operand to the
left the number of bits specified in
the CL register, while shifting in
bits from the second operand.
SHLD
reg/mem32
,
reg32
,
imm8
0F A4 /r
ib
Shift bits of a 32-bit destination
register or memory operand to the
left the number of bits specified in
an 8-bit immediate value, while
shifting in bits from the second
operand.
SHLD
reg/me326
,
reg32
,CL
0F A5 /r
Shift bits of a 32-bit destination
register or memory operand to the
left the number of bits specified in
the CL register, while shifting in
bits from the second operand.
SHLD
reg/mem64
,
reg64
,
imm8
0F A4 /r
ib
Shift bits of a 64-bit destination
register or memory operand to the
left the number of bits specified in
an 8-bit immediate value, while
shifting in bits from the second
operand.
SHLD
reg/mem16
,
reg16
,CL
0F A5 /r
Shift bits of a 64-bit destination
register or memory operand to the
left the number of bits specified in
the CL register, while shifting in
bits from the second operand.
SHR
reg/mem8
,1
D0 /5
Shift an 8-bit register or memory
operand right 1 bit.
SHR
reg/mem8
,CL
D2 /5
Shift an 8-bit register or memory
operand right the number of bits
specified in the CL register.
SHR
reg/mem8
,
imm8
C0 /5
ib
Shift an 8-bit register or memory
operand right the number of bits
specified by an 8-bit immediate
value.
SHR
reg/mem16
,1
D1 /5
Shift a 16-bit register or memory
operand right 1 bit.
SHR
reg/mem16
,CL
D3 /5
Shift a 16-bit register or memory
operand right the number of bits
specified in the CL register.
SHR
reg/mem16
,
imm8
C1 /5
ib
Shift a 16-bit register or memory
operand right the number of bits
specified by an 8-bit immediate
value.
SHR
reg/mem32
,1
D1 /5
Shift a 32-bit register or memory
operand right 1 bit.
SHR
reg/mem32
,CL
D3 /5
Shift a 32-bit register or memory
operand right the number of bits
specified in the CL register.
SHR
reg/mem32
,
imm8
C1 /5
ib
Shift a 32-bit register or memory
operand right the number of bits
specified by an 8-bit immediate
value.
SHR
reg/mem64
,1
D1 /5
Shift a 64-bit register or memory
operand left 1 bit.
SHR
reg/mem64
,CL
D3 /5
Shift a 64-bit register or memory
operand right the number of bits
specified in the CL register.
SHR
reg/mem64
,
imm8
C1 /5
ib
Shift a 64-bit register or memory
operand right the number of bits
specified by an 8-bit immediate
value.