AMD Confidential
User Manual
September 12
th
, 2008
Appendix A
197
Instruction
Supported
Mnemonic
Opcode
Description
CMOVNZ
reg64
,
reg/mem64
0F 45 /r
Move if not zero (ZF = 0).
CMOVNE
reg16
,
reg/mem16
0F 45 /r
Move if not equal (ZF = 0).
CMOVNE
reg32
,
reg/mem32
0F 45 /r
Move if not equal (ZF = 0).
CMOVNE
reg64
,
reg/mem64
0F 45 /r
Move if not equal (ZF = 0).
CMOVBE
reg16
,
reg/mem16
0F 46 /r
Move if below or equal (CF = 1 or ZF
= 1).
CMOVBE
reg32
,
reg/mem32
0F 46 /r
Move if below or equal (CF = 1 or ZF
= 1).
CMOVBE
reg64
,
reg/mem64
0F 46 /r
Move if below or equal (CF = 1 or ZF
= 1).
CMOVNA
reg16
,
reg/mem16
0F 46 /r
Move if not above (CF = 1 or ZF = 1).
CMOVNA
reg32
,
reg/mem32
0F 46 /r
Move if not above (CF = 1 or ZF = 1).
CMOVNA
reg64
,
reg/mem64
0F 46 /r
Move if not above (CF = 1 or ZF = 1).
CMOVNBE
reg16
,
reg/mem16
0F 47 /r
Move if not below or equal (CF = 0 or
ZF = 0).
CMOVNBE
reg32
,
reg/mem32
0F 47 /r
Move if not below or equal (CF = 0 or
ZF = 0).
CMOVNBE
reg64
,
reg/mem64
0F 47 /r
Move if not below or equal (CF = 0 or
ZF = 0).
CMOVA
reg16
,
reg/mem16
0F 47 /r
Move if above (CF = 1 or ZF = 0).
CMOVA
reg32
,
reg/mem32
0F 47 /r
Move if above (CF = 1 or ZF = 0).
CMOVA
reg64
,
reg/mem64
0F 47 /r
Move if above (CF = 1 or ZF = 0).
CMOVS
reg16
,
reg/mem16
0F 48 /r
Move if sign (SF = 1).
CMOVS
reg32
,
reg/mem32
0F 48 /r
Move if sign (SF = 1).
CMOVS
reg64
,
reg/mem64
0F 48 /r
Move if sign (SF = 1).
CMOVNS
reg16
,
reg/mem16
0F 49 /r
Move if not sign (SF = 0).
CMOVNS
reg32
,
reg/mem32
0F 49 /r
Move if not sign (SF = 0).
CMOVNS
reg64
,
reg/mem64
0F 49 /r
Move if not sign (SF = 0).
CMOVP
reg16
,
reg/mem16
0F 4A /r
Move if parity (PF = 1).
CMOVP
reg32
,
reg/mem32
0F 4A /r
Move if parity (PF = 1).
CMOVP
reg64
,
reg/mem64
0F 4A /r
Move if parity (PF = 1).
CMOVPE
reg16
,
reg/mem16
0F 4A /r
Move if parity even (PF = 1).
CMOVPE
reg32
,
reg/mem32
0F 4A /r
Move if parity even (PF = 1).
CMOVPE
reg64
,
reg/mem64
0F 4A /r
Move if parity even (PF = 1).
CMOVNP
reg16
,
reg/mem16
0F 4B /r
Move if not parity (PF = 0).
CMOVNP
reg32
,
reg/mem32
0F 4B /r
Move if not parity (PF = 0).
CMOVNP
reg64
,
reg/mem64
0F 4B /r
Move if not parity (PF = 0).
CMOVPO
reg16
,
reg/mem16
0F 4B /r
Move if parity odd (PF = 0).
CMOVPO
reg32
,
reg/mem32
0F 4B /r
Move if parity odd (PF = 0).
CMOVPO
reg64
,
reg/mem64
0F 4B /r
Move if parity odd (PF = 0).
CMOVL
reg16
,
reg/mem16
0F 4C /r
Move if less (SF <> OF).
CMOVL
reg32
,
reg/mem32
0F 4C /r
Move if less (SF <> OF).
CMOVL
reg64
,
reg/mem64
0F 4C /r
Move if less (SF <> OF).
CMOVNGE
reg16
,
reg/mem16
0F 4C /r
Move if not greater or equal (SF <>
OF).
CMOVNGE
reg32
,
reg/mem32
0F 4C /r
Move if not greater or equal (SF <>
OF).
CMOVNGE
reg64
,
reg/mem64
0F 4C /r
Move if not greater or equal (SF <>
OF).
CMOVNL
reg16
,
reg/mem16
0F 4D /r
Move if not less (SF = OF).
CMOVNL
reg32
,
reg/mem32
0F 4D /r
Move if not less (SF = OF).
CMOVNL
reg64
,
reg/mem64
0F 4D /r
Move if not less (SF = OF).
CMOVGE
reg16
,
reg/mem16
0F 4D /r
Move if greater or equal (SF = OF).
CMOVGE
reg32
,
reg/mem32
0F 4D /r
Move if greater or equal (SF = OF).
CMOVGE
reg64
,
reg/mem64
0F 4D /r
Move if greater or equal (SF = OF).
CMOVLE
reg16
,
reg/mem16
0F 4E /r
Move if less or equal (ZF = 1 or SF
<> OF).
CMOVLE
reg32
,
reg/mem32
0F 4E /r
Move if less or equal (ZF = 1 or SF
<> OF).