System Overview
Am186™CC/CH/CU Microcontrollers User’s Manual
3-31
The width of the data access should not be modified while the processor is fetching
instructions from the associated address space or while the peripheral control block is
overlaid on the affected address space.
3.6.3.3
Byte Write Enables
The Am186CC/CH/CU microcontrollers provide two signals that act as byte write enables—
WHB (Write High Byte, AD15–AD8) and WLB (Write Low Byte, AD7–AD0). WHB is the
logical OR of BHE and WR (WHB is Low when both BHE and WR are Low). WLB is the
logical OR of A0 and WR (WLB is Low when both A0 and WR are Low).
The byte write enables are driven with the nonmultiplexed address bus as required for the
write timing requirements of common SRAMs.
3.6.3.4
Output Enable
The Am186CC/CH/CU microcontrollers provide the RD (Read) signal, which can act as an
output enable for memory or peripheral devices. The RD signal is Low when the
microcontroller reads a word or byte.
3.6.3.5
Bus Mastering
When an external bus master requests control of the local bus (by asserting HOLD), the
microcontroller completes the bus cycle in progress. It then relinquishes control of the bus
to the external bus master by asserting HLDA and floating S2–S0, AD15–AD0, S6,
TMROUT1, and TMROUT0. During HOLD, internal pullups are active for BHE, DEN, DT/R,
LCS, MCS1/CAS1, MCS2/CAS0, MCS3/RAS1, PCS7–PCS0, PIO4/MCS0, RD, UCS,
WHB, WLB, and WR and an internal pulldown is active for A19–A0 and ALE.
Table 3-8
Programming Am186CC/CH/CU Microcontrollers Bus Width
Space
Register
Bit
Value
Bus Width Comments
UCS
UMCS
USIZ
N/A
N/A
Dependent on boot option
1
Notes:
1. UCS width on reset is determined by the {UCSX8} pin. If {UCSX8} is Low, the bus width is x8; if
{UCSX8} is High, the bus is x16. If UCS boots as 8-bit space, it can be overridden by clearing the
USIZ bit. If UCS boots as 16-bit space, it is not reconfigurable to 8-bit.
LCS
LMCS
LSIZ
N/A
N/A
MCS
MPCS
OMSIZ
0
16 bits
Default
1
8 bits
PCS
2
2. PCS space configured for memory only; not I/O.
MPCS
OMSIZ
0
16 bits
Default
1
8 bits
I/O
3
3. If PCB space is mapped to I/O, its functions are not affected by this bit.
MPCS
IOSIZ
0
16 bits
Default
1
8 bits
Other
Memory
4
4. The remaining memory space that does not reside in one of the enabled, memory, chip-select
regions. If PCB space is mapped to memory, its functions are not affected by this bit.
MPCS
OMSIZ
0
16 bits
Default
1
8 bits
Summary of Contents for Am186 CC
Page 1: ...Am186 CC CH CU Microcontrollers User s Manual Order 21914B...
Page 4: ...iv Am186 CC CH CU Microcontrollers User s Manual...
Page 18: ...Table of Contents xviii Am186 CC CH CU Microcontrollers User s Manual...
Page 24: ...Introduction xxiv Am186 CC CH CU Microcontrollers User s Manual...
Page 40: ...Architectural Overview 1 16 Am186 CC CH CU Microcontrollers User s Manual...
Page 86: ...System Overview 3 36 Am186 CC CH CU Microcontrollers User s Manual...
Page 92: ...Emulator Support 4 6 Am186 CC CH CU Microcontrollers User s Manual...
Page 112: ...DRAM Controller 6 8 Am186 CC CH CU Microcontrollers User s Manual...
Page 134: ...Interrupts 7 22 Am186 CC CH CU Microcontrollers User s Manual...
Page 186: ...Programmable I O Signals 9 8 Am186 CC CH CU Microcontrollers User s Manual...
Page 200: ...Watchdog Timer 11 6 Am186 CC CH CU Microcontrollers User s Manual...
Page 232: ...Asynchronous Serial Ports UARTs 13 24 Am186 CC CH CU Microcontrollers User s Manual...
Page 242: ...Synchronous Serial Port SSI 14 10 Am186 CC CH CU Microcontrollers User s Manual...
Page 264: ...High Level Data Link Control HDLC 15 22 Am186 CC CH CU Microcontrollers User s Manual...
Page 332: ...Universal Serial Bus USB 18 34 Am186 CC CH CU Microcontrollers User s Manual...
Page 348: ...Register Summary A 16 Am186 CC CH CU Microcontrollers User s Manual...
Page 376: ...Index Index 18 Am186 CC CH CU Microcontrollers User s Manual...