System Overview
3-20
Am186™CC/CH/CU Microcontrollers User’s Manual
NMI
—
STI
Nonmaskable Interrupt indicates to the microcontroller that an
interrupt request has occurred. The NMI signal is the highest
priority hardware interrupt and cannot be masked. The
microcontroller always transfers program execution to the
location specified by the nonmaskable interrupt vector in the
microcontroller’s interrupt vector table when NMI is asserted.
Although NMI is the highest priority hardware interrupt source,
it does not participate in the priority resolution process of the
maskable interrupts. There is no bit associated with NMI in the
interrupt in-service or interrupt request registers. This means
that a new NMI request can interrupt an executing NMI interrupt
service routine. As with all hardware interrupts, the interrupt flag
(IF) is cleared when the processor takes the interrupt, disabling
the maskable interrupt sources. However, if maskable interrupts
are re-enabled by software in the NMI interrupt service routine
(for example, via the STI instruction), the fact that an NMI is
currently in service does not have any effect on the priority
resolution of maskable interrupt requests. For this reason, it is
strongly advised that the interrupt service routine for NMI should
not enable the maskable interrupts.
An NMI transition from Low to High is latched and synchronized
internally, and it initiates the interrupt at the next instruction
boundary. To guarantee that the interrupt is recognized, the NMI
pin must be asserted for at least one CLKOUT period.
The board designer is responsible for properly terminating the
NMI input.
Also configurable as interrupts are PIO5, PIO15, PIO27, PIO29, PIO30, PIO33, PIO34, and PIO35. For more
information, see Chapter 9, “Programmable I/O Signals.”
Table 3-7
Signal Descriptions (Continued)
Signal Name
1
Multiplexed
Signal(s)
Type Description
Summary of Contents for Am186 CC
Page 1: ...Am186 CC CH CU Microcontrollers User s Manual Order 21914B...
Page 4: ...iv Am186 CC CH CU Microcontrollers User s Manual...
Page 18: ...Table of Contents xviii Am186 CC CH CU Microcontrollers User s Manual...
Page 24: ...Introduction xxiv Am186 CC CH CU Microcontrollers User s Manual...
Page 40: ...Architectural Overview 1 16 Am186 CC CH CU Microcontrollers User s Manual...
Page 86: ...System Overview 3 36 Am186 CC CH CU Microcontrollers User s Manual...
Page 92: ...Emulator Support 4 6 Am186 CC CH CU Microcontrollers User s Manual...
Page 112: ...DRAM Controller 6 8 Am186 CC CH CU Microcontrollers User s Manual...
Page 134: ...Interrupts 7 22 Am186 CC CH CU Microcontrollers User s Manual...
Page 186: ...Programmable I O Signals 9 8 Am186 CC CH CU Microcontrollers User s Manual...
Page 200: ...Watchdog Timer 11 6 Am186 CC CH CU Microcontrollers User s Manual...
Page 232: ...Asynchronous Serial Ports UARTs 13 24 Am186 CC CH CU Microcontrollers User s Manual...
Page 242: ...Synchronous Serial Port SSI 14 10 Am186 CC CH CU Microcontrollers User s Manual...
Page 264: ...High Level Data Link Control HDLC 15 22 Am186 CC CH CU Microcontrollers User s Manual...
Page 332: ...Universal Serial Bus USB 18 34 Am186 CC CH CU Microcontrollers User s Manual...
Page 348: ...Register Summary A 16 Am186 CC CH CU Microcontrollers User s Manual...
Page 376: ...Index Index 18 Am186 CC CH CU Microcontrollers User s Manual...