KINTEX Ult FPGA Board AXKU040 User Manual
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Part 14: JTAG Interface
A JTAG interface is reserved JTAG interface one the AXKU040 FPGA
development board for downloading FPGA programs or firmware to FLASH. In
order to prevent damage to the FPGA chip caused by hot plugging, a protection
diode is added to the JTAG signal to ensure that the voltage of the signal is
within the range accepted by the FPGA to avoid damage of the FPGA chip.
Figure 14-1: JTAG Interface Schematic
JTAG Pin Assignment
Signal Name
FPGA
Pin
FPGA Pin
Number
Description
FPGA_TDI
TDI_0
V9
JTAG Data Input Pin
FPGA_TMS
TMS_0
W9
JTAG Control Pin
FPGA_TDO
TDO_0
U9
JTAG Data Output Pin
FPGA_TCK
TCK_0
AC9
JTAG Clock Pin