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KINTEX Ult FPGA Board AXKU040 User Manual
15 / 59
www.alinx.com
Part 4: QSPI Flash
The AXKU040 FPGA development board is equipped with one 128MBit
Quad-SPI FLASH, and the model is N25Q128A, which uses the 3.3V CMOS
voltage standard. Due to the non-volatile nature of QSPI FLASH, it can store
FPGA configuration Bin files and other user data files in use. The specific
models and related parameters of QSPI FLASH are shown in Table 4-1.
Position
Model
Capacity
Factory
U14
N25Q128A
128M Bit
Numonyx
Table 4-1: QSPI FLASH Specification
QSPI FLASH is connected to the dedicated pins of BANK0 of the FPGA
chip. The clock pin is connected to CCLK0 of BANK0, and other data signals
are connected to D00~D03 and FCS pins. Figure 4-2 shows the hardware
connection of QSPI Flash and FPGA Chip.
Figure 4-2: QSPI Flash Schematic
QSPI Flash pin assignments:
Signal Name
FPGA Pin Name
FPGA Pin Number
QSPI_CCLK
CCLK_0
AA9
QSPI0_CS_B
RDWR_FCS_B_0
U7
QSPI0_IO0
D00_MOSI_0
AC7
QSPI0_IO1
D01_DIN_0
AB7
QSPI0_IO2
D02_0
AA7
QSPI0_IO3
D03_0
Y7