KINTEX-7 FPGA Development Board AV7K325 User Manual
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SFP4_RX_N
BANK117_RX3_N
F5
SFP 4 Data Receiver (Negative)
BANK117_CLK1_P
BANK117_CLK1_P
J8
Transceiver reference clock positive
BANK117_CLK1_N BANK117_CLK1_N
J7
Transceiver reference clock negative
Part 3.3.: PCIe Card Slot
The AV7K325 FPGA development board provides an industrial-grade
high-speed data transfer PCIe x8 interface. The PCIE card interface conforms
to the standard PCIe card electrical specifications and can be used directly on
the x8 PCIe slot of a normal PC. Data communication between PCIEex8,
PCIEex4, PCIex2, and PCIex1 can be realized between the FPGA
development board and the computer.
The transceiver signals of the PCIe interface are directly connected to the
GTX transceivers of FPGA BANK115 and BANK116. The 8 TX signals and RX
signals are connected to the FPGA transceiver by differential signals, and the
single-channel communication rate can be as high as 5G bit bandwidth.
The PCIe interface design principle diagram of FPGA development board
is shown in Figure 3-3-1 below, where TX transmission signal is connected in
AC coupling mode.