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[AKD4344-A] 

<KM087902>  

2007/07 

- 2 - 

 

Operation sequence 

 

1) Set up the power supply lines. 

[VDD] 

 (Red)  = 

2.7 

 3.6V (typ. 3.3V, for AK4344) 

[VCC]  (Red)  = 

2.7 

 3.6V (typ. 3.3V, for AK4112B, for 74LVC541 and for logic) 

[AGND] (Black) 

 = 

0V 

[DGND] (Black) 

  = 

0V 

 

Each supply line should be distributed from the power supply unit. 

 

2) Set-up the evaluation modes, jumper pins and DIP switches 

(See the followings.)

 

 

3) Power on. 

When AK4112B is used, The AK4112B and AK4344 should be reset once by bringing SW2 and SW1 “L” 

upon power-up. 

When AK4112B is not used, keep SW2 to “L”, and the AK4344 should be reset once by bringing SW1 “L” 

upon power-up. 

 

 

Evaluation mode

 

 

1) D/A part evaluation using optical or S/PDIF input <Default>

 

Use PORT1 (RX1: OPT) or J2 (RX1: BNC). 
The AK4112B (DIR) generates MCLK, BICK, LRCK and SDTI1 from the received data through Optical 
connector  (TORX141) or BNC connector. This evaluation mode should be used for the evaluation using CD test 
disk. Nothing should be connected to PORT3 (DSP). The selection of OPT and BNC should be done by JP14 
(RX1) 

 

 

JP7

LRCK

JP4 

MCLK 

JP12 

EXT 

DIR

EXT

DIR 

EXT 

JP5

BICK 

DIR

EXT

JP6

SDTI1

 

 

2) D/A part evaluation using 10-pin connector on the AKM’s A/D evaluation board 

Use PORT3 (DSP). 
It is able to evaluate the AK4344, connecting the 10-pin connector on the AKM’s A/D evaluation board and 
PORT3 (DSP) via 10-line flat cable. MCLK, BICK, LRCK and SDTI1 are sent from the A/D converter evaluation 
board to the AKD4344 through PORT3 (DSP) via 10-line flat cable. 

 

 

JP7

LRCK

JP4 

MCLK 

JP12 

EXT 

DIR

EXT

DIR 

EXT 

JP5

BICK 

DIR

EXT

JP6

SDTI1

 

 

3) D/A part evaluation using PORT3 (DSP), and supplying all interface signals from external equipments

 

In case of using PORT3 (DSP), and supplying signals (MCLK, BICK, LRCK, SDTI1) that is needed for 
the AK4344 from external equipments, set up as 

following. 

 

 

JP7

LRCK

JP4 

MCLK 

JP12 

EXT 

DIR

EXT

DIR 

EXT 

JP5

BICK 

DIR

EXT

JP6

SDTI1

 

 

In case of using PORT3 (DSP), and supplying SDTI2 from external equipments, setting of SDTI2 

should be done by JP8 (SDTI2). 

Summary of Contents for AKD4344-A

Page 1: ...oard FUNCTION Compatible with 2 types of input data interface Direct interface with AKM s A D converter evaluation boards via 10 pin header On board AK4112B as DIR which accepts optical or BNC Inputs Optical output for internal DIT BNC connector for an external clock input BNC connector for DAC output VDD AGND OPT LOUT ROUT AK4112B DIR MCLK OPT Clock Divider Generator Digital In Digital Out 74LVC5...

Page 2: ...evaluation using CD test disk Nothing should be connected to PORT3 DSP The selection of OPT and BNC should be done by JP14 RX1 JP7 LRCK JP4 MCLK JP12 EXT DIR EXT DIR EXT JP5 BICK DIR EXT JP6 SDTI1 2 D A part evaluation using 10 pin connector on the AKM s A D evaluation board Use PORT3 DSP It is able to evaluate the AK4344 connecting the 10 pin connector on the AKM s A D evaluation board and PORT3 ...

Page 3: ...2fs 768fs BICK 64fs in case of MCLK 192fs x2 BICK 64fs in case of MCLK 128fs 256fs 384fs 512fs 768fs Default BICK 32fs in case of MCLK 192fs BICK 128fs in case of MCLK 1024fs 1536fs x4 BICK 32fs in case of MCLK 128fs 256fs 384fs 512fs 768fs BICK 64fs in case of MCLK 1024fs 1536fs x8 BICK 32fs in case of MCLK 1024fs 1536fs 4 JP11 DIV JP9 CLK JP13 LRFS When using J1 EXT these jumper pins should be s...

Page 4: ...PEN x3 x1 512fs 4 096MHz x2 x2 x1 8kHz 768fs 6 144MHz x3 x2 x1 256fs 8 192MHz x1 x2 x1 384fs 12 288MHz OPEN x3 x1 512fs 16 384MHz x2 x2 x1 32kHz 768fs 24 576MHz x3 x2 x1 256fs 11 2896MHz x1 x2 x1 Default 384fs 16 9344MHz OPEN x3 x1 512fs 22 5792MHz x2 x2 x1 44 1kHz 768fs 33 8688MHz x3 x2 x1 256fs 12 288MHz x1 x2 x1 384fs 18 432MHz OPEN x3 x1 512fs 24 576MHz x2 x2 x1 Normal 48kHz 768fs 36 864MHz x3...

Page 5: ...e AK4112B ON H OFF L Mode SW3 3 DIF2 SW3 2 DIF1 SW3 1 DIF0 SDTI Format 0 L L L 16bit LSB justified 3 L H H 24bit LSB justified 4 H L L 24bit MSB justified 5 H L H 24bit I2 S Compatible Default Table 2 SW3 Audio Data Format of AK4112B Note The AK4112B does not support 16bit I2 S Compatible ...

Page 6: ... BNC R PC 1 2 3 4 5 R9 10k C17 22u R13 10k R12 220 J4 BNC R PC 1 2 3 4 5 C100 1n C101 1n LOUT ROUT AK4344 LOUT AK4344 ROUT Figure 2 LOUT ROUT Output circuit AKEMD assumes no responsibility for the trouble when using the above circuit examples Serial control The AKD4344 A can be controlled via the printer port parallel port of IBM AT compatible PC Connect PORT4 uP I F to PC by 10 line flat cable pa...

Page 7: ...wing Operation flow Keep the following flow 1 Set up the control program according to explanation above 2 Click Port Reset button Explanation of each buttons 1 Port Reset Set up the USB interface board AKDUSBIF A 2 Write default Initialize the register of AK4344 3 All Write Write all registers that is currently displayed 4 Function1 Dialog to write data by keyboard operation 5 Function2 Dialog to ...

Page 8: ...K4344 click OK button If not click Cancel button 3 Function2 Dialog Dialog to evaluate ATT Address Box Input registers address in 2 figures of hexadecimal Start Data Box Input starts data in 2 figures of hexadecimal End Data Box Input end data in 2 figures of hexadecimal Interval Box Data is written to AK4344 by this interval Step Box Data changes by this step Mode Select Box If you check this che...

Page 9: ...f file name is akr Operation flow 1 Click Save Button 2 Set the file name and push Save Button The extension of file name is akr 4 2 Open The register setting data saved by Save is written to AK4344 The file type is the same as Save Operation flow 1 Click Open Button 2 Select the file akr and Click Open Button ...

Page 10: ...rval time Set 1 to the address of the step where the sequence should be paused 3 Click Start button Then this sequence is executed The sequence is paused at the step of Interval 1 Click START button the sequence restarts from the paused step This sequence can be saved and opened by Save and Open button on the Function3 window The extension of file name is aks Figure 4 Window of F3 ...

Page 11: ...344 A KM087902 2007 07 11 6 Function4 Dialog The sequence that is created on Function3 can be assigned to buttons and executed When F4 button is clicked the window as shown in Figure opens Figure 5 F4 window ...

Page 12: ...cuted 6 2 SAVE and OPEN buttons on right side SAVE The sequence file names can assign be saved The file name is ak4 OPEN The sequence file names assign that are saved in ak4 are loaded 6 3 Note 1 This function doesn t support the pause function of sequence function 2 All files need to be in same folder used by SAVE and OPEN function on right side 3 When the sequence is changed in Function3 the fil...

Page 13: ...and select the register setting file akr 2 Click WRITE button then the register setting is executed 7 2 SAVE and OPEN buttons on right side SAVE The register setting file names assign can be saved The file name is ak5 OPEN The register setting file names assign that are saved in ak5 are loaded 7 3 Note 1 All files need to be in same folder used by SAVE and OPEN function on right side 3 When the re...

Page 14: ...3 3V Interface PSIA Temperature Room Measurement Results Parameter Results Unit DAC Analog Output Characteristics Lch Rch S N D fs 44 1kHz fin 1KHz 0dBFS fs 96kHz fin 1KHz 0dBFS 91 2 91 2 89 0 89 1 dB dB D Range fs 44 1kHz fin 1KHz 60dBFS A weighted fs 96kHz fin 1KHz 60dBFS A weighted 99 4 99 4 99 4 99 4 dB dB S N fs 44 1kHz no input A weighted fs 96kHz no input A weighted 99 6 99 5 99 4 99 4 dB d...

Page 15: ... 86 84 82 80 78 76 74 72 d B r A 140 0 130 120 110 100 90 80 70 60 50 40 30 20 10 dBFS Figure 1 THD N vs Input Level fin 1KHz AKM 06 18 07 09 28 48 THD N vs Input Freqency fs 44 1kHz fin 0dBFs 100 70 98 96 94 92 90 88 86 84 82 80 78 76 74 72 d B r A 20 20k 50 100 200 500 1k 2k 5k 10k Hz Figure 2 THD N vs Input Frequency Input Level 0dBFS ...

Page 16: ... 50 40 30 20 10 d B r A 140 0 130 120 110 100 90 80 70 60 50 40 30 20 10 dBFS Figure 3 Linearity fin 1KHz AKM 06 18 07 09 49 36 Freqency Response fs 44 1kHz fin 0dBFs 1 1 0 9 0 8 0 7 0 6 0 5 0 4 0 3 0 2 0 1 0 0 1 0 2 0 3 0 4 0 5 0 6 0 7 0 8 0 9 d B r A 2k 20k 4k 6k 8k 10k 12k 14k 16k 18k Hz Figure 4 Frequency Response Input Level 0dBFS ...

Page 17: ...100 94 88 82 76 d B 10 20k 20 50 100 200 500 1k 2k 5k 10k Hz Figure 5 Crosstalk fin 1KHz Input Level 0dBFS no input AKM 06 18 07 10 07 31 FFT fs 44 1kHz fin 0dBFs 1kHz 160 0 150 140 130 120 110 100 90 80 70 60 50 40 30 20 10 d B r A 10 20k 20 50 100 200 500 1k 2k 5k 10k Hz Figure 6 FFT Plot fin 1KHz Input Level 0dBFS ...

Page 18: ...130 120 110 100 90 80 70 60 50 40 30 20 10 d B r A 10 20k 20 50 100 200 500 1k 2k 5k 10k Hz Figure 7 FFT Plot fin 1KHz Input Level 60dBFS AKM 06 18 07 10 09 30 FFT Noise floor fs 44 1kHz 160 0 150 140 130 120 110 100 90 80 70 60 50 40 30 20 10 d B r A 10 20k 20 50 100 200 500 1k 2k 5k 10k Hz Figure 8 FFT Plot no input ...

Page 19: ...60 50 40 30 20 10 d B r A 10 100k 20 50 100 200 500 1k 2k 5k 10k 20k 50k Hz Figure 9 FFT Plot out of band noise THD N vs Input Level fs 96KHz fin 1KHz 120 70 117 5 115 112 5 110 107 5 105 102 5 100 97 5 95 92 5 90 87 5 85 82 5 80 77 5 75 72 5 d B r A 140 0 130 120 110 100 90 80 70 60 50 40 30 20 10 dBFS Figure 10 THD N vs Input Level fin 1KHz ...

Page 20: ...5 100 97 5 95 92 5 90 87 5 85 82 5 80 77 5 75 72 5 d B r A 10 40k 20 50 100 200 500 1k 2k 5k 10k 20k Hz T TT T Figure 11 THD N vs Input Frequency Input Level 0dBFS AKM 06 18 07 10 46 53 Linearity fs 96kHz 140 0 130 120 110 100 90 80 70 60 50 40 30 20 10 d B r A 140 0 130 120 110 100 90 80 70 60 50 40 30 20 10 dBFS Figure 12 Linearity fin 1KHz ...

Page 21: ...3 0 4 0 5 0 6 0 7 0 8 0 9 d B r A 2 5k 40k 5k 7 5k 10k 12 5k 15k 17 5k 20k 22 5k 25k 27 5k 30k 32 5k 35k 37 5k Hz Figure 13 Frequency Response Input Level 0dBFS AKM 06 18 07 10 52 01 Crosstalk fs 96kHz 130 70 125 120 115 110 105 100 95 90 85 80 75 d B 10 40k 20 50 100 200 500 1k 2k 5k 10k 20k Hz Figure 14 Crosstalk fin 1KHz Input Level 0dBFS no input ...

Page 22: ...0 80 70 60 50 40 30 20 10 d B r A 10 40k 20 50 100 200 500 1k 2k 5k 10k 20k Hz Figure 15 FFT Plot fin 1KHz Input Level 0dBFS AKM 06 18 07 10 28 58 FFT fs 96kHz fin 60dBFs 1kHz 160 0 150 140 130 120 110 100 90 80 70 60 50 40 30 20 10 d B r A 10 40k 20 50 100 200 500 1k 2k 5k 10k 20k Hz Figure 16 FFT Plot fin 1KHz Input Level 60dBFS ...

Page 23: ...110 100 90 80 70 60 50 40 30 20 10 d B r A 10 40k 20 50 100 200 500 1k 2k 5k 10k 20k Hz Figure 17 FFT Plot no input AKM 06 18 07 10 30 24 FFT Out of band Noise fs 96kHz 160 0 150 140 130 120 110 100 90 80 70 60 50 40 30 20 10 d B r A 10 100k 20 50 100 200 500 1k 2k 5k 10k 20k 50k Hz Figure 18 FFT Plot out of band noise ...

Page 24: ...y exchange or strategic materials AKEMD products are neither intended nor authorized for use as critical componentsNote1 in any safety life support or other hazard related device or systemNote2 and AKEMD assumes no responsibility for such use except for the use approved with the express written consent by Representative Director of AKEMD As used here Note1 A critical component is one whose failure...

Page 25: ...June 12 2007 Title Size Document Number Rev Date Sheet of AK4344 2 AKD4344 A A4 1 6 Tuesday June 12 2007 Title Size Document Number Rev Date Sheet of AK4344 2 AKD4344 A A4 1 6 Tuesday June 12 2007 CDTO SDTI2 CDTO SDTI2 C2 10u C2 10u C1 0 1u C1 0 1u JP2 3x1 JP2 3x1 CN2 CN2 9 10 11 12 13 14 15 16 C3 4 7u C3 4 7u CN1 CN1 1 2 3 4 5 6 7 8 AK4344 U1 AK4344 U1 MCLK 1 BICK 2 SDTI1 3 LRCK 4 PDN 5 CSN 6 CCL...

Page 26: ... A A4 2 6 Thursday May 31 2007 Title Size Document Number Rev Date Sheet of AK4112B 2 AKD4344 A A4 2 6 Thursday May 31 2007 11 2896MHz U2 AK4112B U2 AK4112B DVDD 1 DVSS 2 TVDD 3 V TX 4 XTI 5 XTO 6 PDN 7 R 8 AVDD 9 AVSS 10 RX1 11 RX2 DIF0 12 RX3 DIF1 13 RX4 DIF2 14 AUTO 15 P S 16 FS96 17 ERF 18 LRCK 19 SDTO 20 BICK 21 DAUX 22 MCKO2 23 MCKO1 24 OCKS0 CSN 25 OCKS1 CCLK 26 CM1 CDTI 27 CM0 CDTO 28 C4 1...

Page 27: ...ay May 31 2007 Title Size Document Number Rev Date Sheet of 74LVC541A 2 AKD4344 A A4 3 6 Thursday May 31 2007 Title Size Document Number Rev Date Sheet of 74LVC541A 2 AKD4344 A A4 3 6 Thursday May 31 2007 DIR EXT EXT EXT DIR DIR MCLK BICK SDTI1 LRCK SDTI2 PORT3 GND JP8 3x1 JP8 3x1 C12 0 1u C12 0 1u JP6 2x1 JP6 2x1 R2 51 R2 51 JP4 3x1 JP4 3x1 U3 74LVC541A U3 74LVC541A A1 2 A2 3 A3 4 A4 5 A5 6 A6 7 ...

Page 28: ...C14 U7D 74HC14 9 8 U7A 74HC14 U7A 74HC14 1 2 14 7 U6 74AC163 U6 74AC163 A 3 QA 14 B 4 QB 13 C 5 QC 12 D 6 QD 11 RCO 15 ENP 7 ENT 10 CLK 2 LOAD 9 CLR 1 VCC 16 GND 8 R6 51 R6 51 JP11 3x2 JP11 3x2 1 3 5 6 4 2 U7B 74HC14 U7B 74HC14 3 4 U7F 74HC14 U7F 74HC14 13 12 JP13 3x2 JP13 3x2 1 3 5 6 4 2 U4B 74AC74 U4B 74AC74 D 12 Q 9 CLK 11 Q 8 PR 10 CL 13 VCC 14 GND 7 U7E 74HC14 U7E 74HC14 11 10 JP10 4x2 JP10 4...

Page 29: ... short R30 short R11 75 R11 75 R17 47K R17 47K R13 10k R13 10k R24 100 R24 100 U9E 74HCT04 U9E 74HCT04 11 10 C100 1n C100 1n C16 0 1u C16 0 1u R23 470 R23 470 R29 100K R29 100K J2 BNC R PC J2 BNC R PC 1 2 3 4 5 PORT2 TOTX141 PORT2 TOTX141 GND 1 VCC 2 IN 3 U8F 74HC14 U8F 74HC14 13 12 7 14 R27 100 R27 100 R16 47K R16 47K R15 47K R15 47K R25 10k R25 10k U9A 74HCT04 U9A 74HCT04 1 2 J3 BNC R PC J3 BNC ...

Page 30: ...A A4 6 6 Thursday May 31 2007 DGND AGND For 74HC14 x 1 74HCT04 x 1 74AC74 x 1 74HC4040 x 1 74AC163 x 1 74HC14 x 1 VDD GND AGND DGND AGND T_45 BLACK AGND T_45 BLACK 1 L3 short L3 short 1 2 C28 0 1u C28 0 1u C22 0 1u C22 0 1u C27 0 1u C27 0 1u JP15 2x1 JP15 2x1 JP16 2x1 JP16 2x1 VCC T_45 RED VCC T_45 RED 1 L2 short L2 short 1 2 C23 0 1u C23 0 1u C20 47u C20 47u C24 0 1u C24 0 1u C25 0 1u C25 0 1u C2...

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