[AKD4128A-A]
[KM104301]
2010/09
- 8 -
(2). Setting for Output port
(2)-1. When using DIT function of AK4114 (U6)
(2)-1-1. Setup the TX.
(a) Select to Optical jack (Default) (b) Select to BNC jack
O U T P U T S E L
J P 4 4
3
B
NC O
P
T
O U T P U T S E L
J P 4 4
B
NC O
P
T
3
(2)-1-2. Setup the TXI.
Select to input signal for XTI/OMCLK pin of AK4128A(U1) and XTI pin of AK4114(U6).
(a) When using X’Tal(X1). In this case, X’Tal(X2) is “open”.
JP52
EXT-CLK
DIT-OMCKO SEL
JP51
3
2 4
A
K
41
28
EX
T
JP45
DIT-OMCLK SEL
DIT
DSP5
EXT
2
5
6
JP53
SEL3
3
GND
OMCLK
JP20
MCKO
(b) When using X’Tal(X2). In this case, X’Tal(X1) is “open”.
JP52
EXT-CLK
DIT-OMCKO SEL
JP51
3
2 4
A
K
412
8
EX
T
JP45
DIT-OMCLK SEL
DIT
DSP5
EXT
2
5
6
JP53
SEL3
3
GND
OMCLK
JP20
MCKO
(c) When using J8(EXT-CLK). In this case, X’Tal(X1 and X2) is “open”.
JP52
EXT-CLK
DIT-OMCKO SEL
JP51
3
2 4
A
K
412
8
EX
T
JP45
DIT-OMCLK SEL
DIT
DSP5
EXT
2
5
6
JP53
SEL3
3
GND
OMCLK
JP20
MCKO
Summary of Contents for AKD4128A-A
Page 49: ...AK4128A A Rev 0 部品面シルク図 AKD4128A A Rev 0 Evaluation Board ...
Page 50: ...AK4128A A Rev 0 半田面シルク図 ...
Page 51: ...AK4128A A Rev 0 部品面パターン図 ...
Page 52: ...AK4128A A Rev 0 半田面パターン図 ...
