Aiwa XD-DV170, Service Manual

Page: 37 / 53

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Pin No. Pin Name I/O Description
1
2
3, 4
5
6 ~ 9
10
11 ~ 18
19
20 ~ 27
28
29
30
31
32
33, 34
35, 36
37
38
39
40 ~ 43
44
45 ~ 52
53
54 ~ 57
58
59
60
61
62
63
64
65
66
67, 68
69
70
71
72
73
74
75
________________
CS1ROM
________________
CS0ROM
VSS
VCC
A0 ~ 3
VSS
A4 ~ 11
VSS
A12 ~ 19
VSS
A20
CODEC_ERR
____________________
INT_VDEC
_______________
HD_INT
P67, 66
VSS
SCL
SDA
VCC
D0 ~ 3
VSS
D4 ~ 11
VSS
D12 ~ 15
VCC
TXD0
TXD1
RXD0
RXD1
SCK0
SCK1
VSS
__________________
CS VDEC
VSS
________
CS5
DREQ1
RESET FR
CS_FR
________________
SYSRST
REMOCON
USCL
—
O
I
I
O
I
O
I
O
I
O
—
I
I
—
I
O
I/O
I
I/O
I
I/O
I
I/O
I
O
O
I
I
O
O
I
O
I
O
I
O
O
O
I
O
Not used.
Chip select output terminal for ROM.
GND.
Power input terminal. EVER 5 V.
Address bus output terminal.
GND.
Address bus output terminal.
GND.
Address bus output terminal.
GND.
Not used.
Not used.
Interrupt signal for AV DECODER IC.
Interrupt signal from LOADER.
Not used.
GND.
EEPROM serial clock output.
EEPROM serial data I/O.
Power input terminal. EVER 5 V.
Data bus input/output terminal.
GND.
Data bus input/output terminal.
GND.
Data bus input/output terminal.
Power input terminal. EVER 5 V.
Data output terminal for FL DRIVER IC serial communication control.
Data output terminal for LOADER serial communication control.
Data input terminal for FL DRIVER IC serial communication control.
Data input terminal for LOADER serial communication control.
Clock output terminal for FL DRIVER IC serial communication control.
Clock output terminal for LOADER serial communication control.
GND.
Chip select output terminal for AV DECODER IC.
GND.
Chip select output terminal for SRAM.
MPEG decoder data request.
Reset for Front Board.
FL DRIVER IC chip select output terminal.
System reset signal output terminal.
Remote control signal input terminal.
I
2
C clock output terminal for EEPROM, video encoder IC.
IC DESCRIPTION - 3/8 (HD6412350F20) -1/3