-36-
Pin No.
Pin Name
I/O
Description
123
124 ~ 126
127
128, 129
130
131
132 ~ 134
135
136 ~ 138
139
140 ~ 142
143
144
145, 146
147
148
149
150
151
152
153
154
155
166
157
158
159
160
VSS
SBD_12 ~ 10
VDD
SBD_9, 8
SCLK
VSS
SBA_9 ~ 7
VDD
SBA_6 ~ 4
VSS
SBA_3 ~ 1
VDD
SBA_0
SBA_10, 11
VSS
_____
SCS1
____
SCS
_____
SRAS
VDD
_____
SCAS
____
SWE
SDQM
VSS
PLLVDD
NC
PLLVSS
VDD
NC
I
I/O
I
I/O
I/O
I
O
I
O
I
O
I
O
O
I
O
O
O
I
O
O
O
I
I
—
I
I
—
Ground.
SDRAM data bus 12 ~ 10.
Power (3.3V).
SDRAM data bus 9, 8.
SDRAM 81MHz clock.
Ground.
SDRAM address bus 9 ~ 7.
Power (3.3V).
SDRAM address bus 6 ~ 4.
Ground.
SDRAM address bus 3 ~ 1.
Power (3.3V).
SDRAM address bus 0.
SDRAM address bus 10, 11.
Ground.
Chip select for second DRAM.
Chip select for SDRAM.
SDRAM row address strobe.
Power (3.3V).
SDRAM column address strobe.
SDRAM write enable.
SDRAM control pin.
Ground.
Power-phase locked loop for SDRAM.
Not connected.
Phase locked-loop ground pin.
Power (3.3V).
Not connected.
IC DESCRIPTION - 2/8 (L64021D) -3/3
Summary of Contents for XD-DV170
Page 11: ... 11 SCHEMATIC DIAGRAM 1 MAIN C B 1 9 VSS DC10V ...
Page 12: ... 12 SCHEMATIC DIAGRAM 2 MAIN C B 2 9 ...
Page 13: ... 13 SCHEMATIC DIAGRAM 3 MAIN C B 3 9 C262 1000 25 ...
Page 15: ... 15 SCHEMATIC DIAGRAM 5 MAIN C B 5 9 ...
Page 18: ... 18 SCHEMATIC DIAGRAM 8 MAIN C B 8 9 VFU 2SA1037K R ...
Page 22: ... 22 SCHEMATIC DIAGRAM 10 FRONT C B LED DRIVE IC500 POWER SUPPLY SW ...
Page 26: ... 26 SCHEMATIC DIAGRAM 12 DVD MECHANISM SECTION ...
Page 28: ... 28 LCD DISPLAY ...
Page 29: ... 29 IC BLOCK DIAGRAM 1 4 IC BA00ASFP IC SN74LV541APW ...