51
Chapter 4. BIOS Configuration Settings
HA201-PV
User Manual
PCH sSATA
Configuration
SLP_LAN# Low on DC
Power
Enable
Disable
K1 off
Enable
Disable
FPK Port 1-4
Enable
Management
Disable
PCI Delay
Optimization
Enable
Disable
Compliance Test
Mode
Enable
Disable
PCI-E ASPM Support
(Global)
Per individual port
L1 Only
CTO for Uplink x16
CTO for Uplink x8
40-50ms(spec
50us-50ms)
40-50ms(spec
16ms-55ms)
160-170ms
(spec 65ms-
210ms)
400-500ms
(spec 260ms-
900ms)
1.6-1.7s(spec
1s-3.5s)
Disable
MPL for Uplink x16
MPL for Uplink x8
MPL 128B
MPL 256B
MPL 512B
PCIE Clock Gating
Enable
Disable
PCH DMI ASPM
Platform-POR ASPM L
Disable
DMI Link Extended
Synch Control
Enable
Disable
Stop and Scream
Enable
Disable
Expanded SPI TPM
Transaction Length
Enable
Enable
Disable
Subtractive Decode
Enable
Disable
Subtractive Decode
Port#
Min=0, Max=7
PCIe Root Port
Function Swapping
Enable
Disable
Max Read Request
Size
MRRS 128B
MRRS 256B
MRRS 512B
MRRS1024B
MRRS2048
MRRS4096
PCI Express Root Port
1-20
PCIE ASPM
Disable ASPM
ASPM L1
ASPM Auto
L1 Substates
Disable
L1.1
L1.2
L1.1 & L1.2
Gen 3 Eq
Phase3
Method
Hardware
Static Coeff
Software Search