SOM-6765 User Manual
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Set SIRQ mode.
Debug Port 80
Show Debug Port 80 from PCI or LPC
PCI Express Root Port 0
Figure 3.23 PCI Express Root Port 0
PCI Express Port 0
Enable / Disable PCI Express Root Port 0.
Port 0 IOxAPIC
Enable / Disable PCI Express Root Port 0 I/O APIC.
Automatic ASPM
Automatically enable ASPM based on reported capabilities and known issues.
PME SCI
PCI Express PME SCI Enable/Disable.
Hot Plug
PCI Express Hot Plug Enable/Disable.
Extra Bus Reserved
Extra Bus Reserved (0-7) for bridges behind this Root Bridge.
Reseved Memory
Reserved Memory and Prefetchable Memory (1-20MB) Range for this Root Bridge.
Reserved I/O
Reserved I/O (4K/8K/12K/16K/20K) Range for this Root Bridge.
