４１
Table 10
: PCI Express* Slot Card / Device Down Trace Length Guidelines
Parameter
Main Route Guidelines
Notes
Signal Group
PCI Express* expansion
Differential Impedance Target
85Ω±10%
Single End
55Ω±10%
Isolation to equivalent pairs
11H (MS) and 3H(DS)
1,2
Isolation to other signal groups
11H (MS) and 5H (DS)
1
Tx/Rx Spacing
11H(MS) and 5H (DS)
1
LA + LB
Please see the
SOM-5992 Layout Checklist
Lc
Carrier Board Length
Max length of LA+LB+LC
Slot Card:
14”
Device Down:
4~ 16”
Length matching
Differential pairs (intra-pair): Max.
2
mils
and REFCLK- (intra-pair):Max.
5
mils
Reference Plane
GND referencing preferred
Min 40-mil trace edge-to-major plane edge spacing
GND stitching vias required next to signal vias if
transitioning layers between GND layers
Power referencing acceptable if stitching caps are
used
Carrier Board Via Usage
Max. 2 vias per TX
Max. 4 vias per RX (to device)
Max. 2 vias per RX (to slot)
AC coupling
The AC coupling capacitors for the TX lines are
incorporated on the COM Express Module. The AC
coupling capacitors for RX signal lines have to be
implemented on the customer COM Express Carrier
Board. Capacitor type: X7R, 100nF ±10%, 16V, shape
0402.
3
Notes:
1.
H is height above reference plane.
2.
Equivalent pairs are TX to TX or RX to RX(Noninterleaved)
3.
AC caps are recommended to be placed close to PCIe device side (avoid placing AC cpas on
mid-bus).
