Chapter 5 A/D conversion 39
Bits in this register indicate the end of conversion status, single-
ended/differential input, interrupt status and the number of the
channel to be converted next. Refer to Chapter 4, A/D status register,
for more information.
Input range selection
Each A/D channel has its own individual input range, controlled by a
range code stored in on-board RAM and the setting of jumper JP7.
Please refer to Chapter 4, A/D range control, for more information.
MUX setting
The PCL-818L offers 16 single-ended or eight differential analog
input channels. Set jumper JP6 for the channel configuration before
you set the multiplexer scan range. The MUX scan register specifies
the high and low limits of the scan range. The MUX scan register is a
read/write register at address BASE+2. Bits D0 to D3 hold the
starting channel number, and positions D4 to D7 hold the stop scan
channel number. When you set the PCL-818L for eight differential
input channels, bits CH3 and CL3 must be zero.
The MUX scan register data format is:
BASE+2 (write) start and stop scan channels
Bit
D7
D6
D5
D4
D3
D2
D1
D0
Value
CH3
CH2
CH1
CH0
CL3
CL2
CL1
CL0
If you require only one A/D input channel, you should set the high
and low scan limits to the same value. If you specify a range of input
channels, the PCL-818L automatically performs an A/D conversion
on each channel in the range, beginning with the start channel. When
it reaches the stop channel, it loops back to the start channel and
continues. This looping continues until the specified number of
conversions is completed. Note that writing to the MUX automatical-
ly resets it to the start channel.
Summary of Contents for PCL-818L
Page 1: ...PCL 818L High performance DAS card with programmable gain ...
Page 5: ...Chapter 1 General information 1 1 General information C H A P T E R ...
Page 13: ...Chapter 2 Installation 9 C H A P T E R 2 Installation ...
Page 25: ...Chapter 3 Signal connections 21 3 Signal connections C H A P T E R ...
Page 31: ...Chapter 4 Register structure and format 27 4 Register structure and format C H A P T E R ...
Page 41: ...Chapter 5 A D conversion 37 C H A P T E R 5 A D conversion ...
Page 47: ...Chapter 6 D A conversion 43 6 D A conversion C H A P T E R ...
Page 50: ...46 PCL 818L User s Manual ...
Page 51: ...Chapter 7 Digital input and output 47 7 Digital input and output C H A P T E R ...
Page 53: ...Chapter 8 Programmable counter timer 49 8 Programmable timer counter C H A P T E R ...
Page 61: ...Chapter 9 Direct memory access operation 57 9 Direct memory access operation C H A P T E R ...
Page 64: ...60 PCL 818L User s Manual ...
Page 65: ......
Page 68: ...Appendix C PC I O port address map 65 C PC I O port address map A P P E N D I X ...
Page 70: ...Appendix D Calibration 67 D Calibration A P P E N D I X ...
Page 73: ...70 PCL 818L User s Manual ...
Page 75: ...2 PCL 818L User s Manual ...