Advantech PCI-1752, Quick Start Manual

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Chapter
4
– 31 – PCI-1752/54/56 User’s Manual
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4. Operation
This chapter describes the operation of the PCI-1752/1754/1756. The
software driver provided allows a user to access all of the card’s
functions without register level programming. For users who prefer to
implement their own bit-level programming, please refer to the follow-
ing information in this chapter.
4.1 Interrupt Function
The isolated digital input channels (IDI00, IDI16, IDI32 and IDI48 in
PCI-1754; IDI00 and IDI16 in PCI-1756) are connected to the interrupt
circuitry. Users can disable/enable interrupt function, select trigger
type or latch the port data by setting the
Interrupt Control Register of
the PCI-1754/1756. When the interrupt request signals occur, then the
software will service these interrupt requests by ISR. The multiple
interrupt sources provide the card with more capability and flexibility.
IRQ Level
The IRQ level is set automatically by the PCI plug-and-play BIOS and
is saved in the PCI controller. There is no need for users to set the IRQ
level. Only one IRQ level is used by this card, although it has two or
four interrupt sources.
Interrupt Control Register
The Interrupt Control Register controls the function and status of
each interrupt signal source. Table 4-1 shows the bit map of the
Interrupt Control Register . The register is a readable/writable register.
While being written, it is used as a control register; and while being
read, it is used as a status register.
Table 4-1 Interrupt control register bit map
n : the group’s number
Ln/E : Latch port data disable/enable control bit
INTn/E : Interrupt disable/enable control bit
En : Interrupt triggering edge control bit
Fn : Interrupt flag bit
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Group n interrupt control register
Base Add.+8+2n 3 2 1 0
Abbreviation Fn En INTn/E Ln/E