Advantech PCA-6181, Manual, Page: 47 / 126

Chapter 3 Award BIOS Setup 33
3.5 Advanced Chipset Features
By choosing the “Advanced Cipset Features” option from the “Initial
Setup Screen” menu, the screen below will be displayed. This sample
screen contains the manufacturer’s default values for this CPU card, as
shown in Figure 3-5:
Note: DRAM default timings have been carefully chosen
and should ONLY be changed if data is being lost.
Please first contact technical support.
Figure 3-4: Advanced chipset features screen
3.5.1 DRAM Clock
This item allows you to control the DRAM speed. The Choice: Host
Clock, CLK-33M.
3.5.2 SDRAM Cycle Length
When synchronous DRAM is installed, the number of clock cycles of
CAS latency depends on the DRAM timing. Do not reset this field
from the default value specified by the system designer. The Choice:
2, 3.