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MIC-5602 User Manual
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5.1
Module Management Controller (MMC)
As mentioned in Section 2.2.8, the MMC is an intelligent controller that manages the
AMC (e.g. health monitoring, hot swap, LEDs, etc.). It provides a communication
interface to a carrier in an ATCA or µTCA system over an IPMB bus (IPMB-L). Fur-
thermore, a connection to the x86-system is implemented by a serial interface to the
3100 chipset.
The MIC-5602 MMC is based on an Atmel AVR microcontroller. The Atmega128L is
equipped with 128 KB internal Flash, 4 KB SRAM and 4 KB EEPROM. The flash
holds a boot-loader and two firmware images and the FRU data is stored in the inter-
nal EEPROM.
The hardware I2C of the AVR is used as IPMB-L bus interface and one of the
ATmega128 UARTs as serial payload interface to the chipset. Additionally there are
several signals connected between MMC and CPU / chipset for payload monitoring
and control (payload reset, sleep signals, E-Keying, etc.).
Voltage and temperature monitoring is done with the AVR ADC input pins and two
external temperature sensors. Please refer to section 2.2.8 for detail.
5.1.1
BIOS Image Selection by MMC
Booting from the BIOS recovery image can be forced with a jumper setting (verify
chapter 2.2.19). Additionally it is possible to force the recovery image over the IPMB-
L bus or payload interface with the MMC. This is accomplished by a parameter stored
in the FRU data. If the parameter (byte) is set to 0x01, the MMC will force execution
of the recovery image within the next boot sequence. If the byte is zero (default), the
BIOS user image is executed. To read and write this parameter, Advantech OEM
IPMI commands are used.
5.1.1.1
Read BIOS Image configuration
The "Read Configuration Settings" Advantech OEM IPMI command can be used to
read out the BIOS image selection setting.
Table 5.1: Command Assignment
IPMI net function
0x2E / 0x2F (OEM)
Advantech IPMI OEM command
0x41
Table 5.2: Request Data
Byte
Data field
1:3
Advantech IANA ID: 0x39 28 00
4
Logical device number: 0x03
5
Port byte: 0x00
Table 5.3: Response Data
Byte
Data field
1
Completion Code
2:4
Advantech IANA ID: 0x39 28 00
5
Current setting: 0x00 = BIOS user image
0x01 = BIOS recovery image
Summary of Contents for MIC-5602
Page 1: ...User Manual MIC 5602 Advanced Mezzanine Card Processor AMC...
Page 8: ...MIC 5602 User Manual viii...
Page 12: ...MIC 5602 User Manual xii...
Page 16: ...MIC 5602 User Manual 4...
Page 17: ...Chapter 2 2 Board Specification This chapter describes the hard ware features of the MIC 5602...
Page 33: ...Chapter 4 4 AMI BIOS Setup This chapter describes how to configure the AMI BIOS...
Page 44: ...MIC 5602 User Manual 32 Figure 4 13 Hard Disk Drives Figure 4 14 Removable Drives...
Page 51: ...Chapter 5 5 MMC Firmware Operation This chapter describes the MMC firmware features...
Page 66: ...MIC 5602 User Manual 54...
Page 67: ...Chapter 6 6 Overview of Supported Features and Known Limitations...
Page 71: ...Appendix A A IPMI PICMG Command Subset Supported by MMC...