![background image](http://html.mh-extra.com/html/advantech/mi-o-128/mi-o-128_design-manual_2858351010.webp)
10
1.2.2 Schematic Guidelines
Each RGB output (RED, GREEN, and BLUE) is terminated with one 150-Ω resistor near
the chipset from the DAC output to the board ground. A second 150Ω resistor should
be placed close to the CRT connector. Additionally, one 75-Ω termination resistor
exists within the display. The equivalent DC resistance at the output of each DAC is
37.5 Ω. The current output from each DAC flows into this equivalent resistive load to
produce a video voltage without the need for external buffering. There is also a
pi-filter on each channel that is used to reduce high-frequency noise and to reduce
EMI. In order to maximize the performance, the filter impedance, cable impedance,
and load impedance should be matched.
The host VGA controller in CPU board is weak device without strong ESD protection,
and therefore ESD and EMI solutions close to connector are must for VGA port.
Figure 1.2.1-1 Demonstration for VGA Application
C7
100pF
50V
0402
C8
10pF
50V
0402
C9
10pF
50V
0402
VGA_y _DDAT
VGA_y _VS
VGA_y _HS
VGA_y _DCLK
C10
100pF
50V
0402
B5
600_100MHz
0.3A
0402
R1
0 5%
0402
R2
0 5%
0402
B6
600_100MHz
0.3A
0402
VGA_DDC_DAT
VGA_VS
VGA_HS
VGA_DDC_CLK
GND_Chasis
GND_Chasis
CPU
Board
I/O Board
CN
D3
MBRX120-TP
1A
SOD-123
1
2
PS1
SPR-P150
1.5A
0805
B4
120_100MHz
2A
0603
+V5_VGA
C4
10pF
50V
0402
B3
47_100MHz
0.3A
B2
47_100MHz
0.3A
B1
47_100MHz
0.3A
+V3.3
VGA_z_B
M1
0.1uF
16V
0402
VGA_z_R
VGA_z_G
VGA_z_R
VGA_z_B
D1
AZC099-04S.R7G
5.5A
SOT-23-6
1
2
3
4
6
5
C2
10pF
50V
0402
C1
10pF
50V
0402
VGA_R
VGA_B
C3
10pF
50V
0402
VGA_G
C5
10pF
50V
0402
C6
10pF
50V
0402
VGA_z_G
CN1
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
+V5_VGA
VGA_y _VS
M2
0.1uF
16V
0402
VGA_y _HS
D2
AZC099-04S.R7G
5.5A
SOT-23-6
1
2
3
4
6
5
VGA_y _DCLK
VGA_y _DDAT
RA3
150
1%
0402
RA2
150
1%
0402
RA1
150
1%
0402
GND_Chasis