Advantech EAX-R680RP, User Manual

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EAX-R680RP
User’s Manual
72 EAX-R680RP
User’s Manual
3.6.3.2.1.7 Intel X550-AT2 LAN Chip (PCI-E Port 9~12)
Item Option Description
Intel X550-AT2 LAN Chip
(PCI-E Port 9~12)
Disabled
Enabled [Default] ,
Control the PCI Express Root Port.
ASPM
Disabled [Default]
L1
Auto
Set the ASPM Level: Force L0s - Force all
links to L0s State AUTO - BIOS auto
configure DISABLE - Disables ASPM
L1 Substates
Disabled
L1.1
L1.1 & L1.2 [Default]
PCI Express L1 Substates settings.
PCIe Speed
Auto [Default]
/Gen1/Gen2
/Gen3/Gen4
Configure PCIe Speed
Detect Timeout 0
The number of milliseconds reference code
will wait for link to exit Detect state for
enabled ports before assuming there is no
device and potentially disabling the port.