Advantech ARK-5420 Series, User Manual

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ARK-5420 User Manual 64
A.1 Programming the Watchdog Timer
The ARK-5420's watchdog timer can be used to monitor system software operation
and take corrective action if the software fails to function within the programmed
period. This section describes the operation of the watchdog timer and how to pro-
gram it.
A.1.1 Watchdog Timer Overview
The watchdog timer is built into the super I/O controller SMSC SCH3114. It provides
the following user-programmable functions:
 Can be enabled or disabled via user program
 Timer can be set from 1 to 255 seconds or 1 to 255 minutes
 Generates an interrupt or resets signal if the software fails to reset the timer
 before time-out
A.1.2 Programming the Watchdog Timer
The I/O port address of the watchdog timer is 680h (hex).
Table A.1: Watchdog Timer Registers
Address: 680h
(hex) Register Read/
Write Description
65 (hex) write
Set seconds or minutes as units for the timer.
Write 0 to bit 7: set second as counting unit. [default]
Write 1 to bit 7: set minutes as counting unit.
66 (hex) write
0: Stop timer [default]
01~FF (hex): The amount of the count, in seconds or min- utes,
depends on the value set in register 65 (hex). This number decides
how long the watchdog timer waits for strobe before generating an
interrupt or reset signal. Writing a new value to this register can
reset the timer to count with
the new value.
67 (hex)
read/
write
Configure watchdog timer
Bit 1:Write 1 to enable keyboard to reset the timer, 0 to dis- able.
[default]
Bit 2: Write 1 to enable mouse to reset the timer, 0 to dis-
able.[default]
Bit 7~4: Set the interrupt mapping of watchdog timer:
1111=IRQ15
……
0011=IRQ3
0010=IRQ2
0001=IRQ1
0000=Disable [default]
68 (hex)
read/
write
Control watchdog timer
Bit0: Read watchdog state; 1=Timer timeout
Bit2: Write 1 to immediately generate timeout signal, and automat-
ically return to 0 (Write only).
Bit3: Writer 1 to allow triggering of timer timeout when P20 is effec-
tive, 0 to disable. [default]