User’s Manual
LM5560-Q45
59
2.2.3
Advanced Chipset Features
DRAM default timings have been carefully chosen and should ONLY
be changed if data is being lost. Please first contact technical sup-
port
2.2.3.1 DRAM Timing Selectable
The options: Manual, by SPD
2.2.3.2 System BIOS Cacheable
Selecting “Enabled” allows caching of the system BIOS ROM at F0000h- FFFFFh, resulting
in better system performance. However, if any pro- gram writes data to this memory area, a
system error may occur. The Choices are “Enabled”, and “Disabled”.
2.2.3.3 Memory Hole at 15M-16M
Enabling this feature reserves 15 MB to 16 MB memory address space for ISA expansion
cards that specifically require this setting. This makes memory from 15 MB and up
unavailable to the system. Expansion cards can only access memory up to 16 MB. The
default setting is “Disabled”.
Summary of Contents for LM5560-Q45
Page 12: ...LM5560 Q45 12 Block Diagram ...
Page 16: ...LM5560 Q45 16 1 3 Motherboard Layout ...
Page 39: ...User s Manual LM5560 Q45 39 1 8 6 Serial Port Connector 2 COM2 ...
Page 41: ...User s Manual LM5560 Q45 41 1 8 8 Amplifier Connector JAMP1 1 8 9 Digital I O Connector JDIO1 ...
Page 62: ...LM5560 Q45 62 2 2 4 Integrated Peripherals 2 2 4 1 OnChip IDE Device ...