LEC-
iMX8M plus User’s Guide 1.0
SGET SMARC Rev 2.1
Page 12
copyright © 2021 ADLINK Technology Inc.
2.6
Extension busses
PCIe
Two PCI Express GEN2 x1 interfaces
USB
CT temp 2x USB 3.0/2.0, 3x USB 2.0 and , 1x USB2.0 OTG
ER temp 1x USB 3.0, 1xUSB2.0 OTG
UART
Four UART interface SER0, SER2 (Tx/Rx/CTS/RTS) and SER1, SER3(optional) (Tx/Rx)
7- or 8-bit data words, 1 or 2 stop bits, programmable parity (even, odd, or none)
Programmable baud rates up to 4 Mbps.
CAN bus
Supporting dual CAN2.0B only or mixed CAN2.0B and CAN FB mode, data bit rate up to 8 Mbps
SPI
2x SPI
I2S
I2S interface< CODEC located on the carrier
I2C
5x I2C interfaces
- Support for 7-bit and 10-bit address mode
- Software programmable clock frequency of 100 kbit/s in Standard-mode,
400 kbit/s in the Fast-mode or 1 Mbit/s in Fast-mode Plus
GPIO
Summary of Contents for SMARC NXP i.MX8M-plus Quad NPU
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