ADLINK Technology Inc.
LEC-EL Product specification
Page 4
copyright © 2021 ADLINK Technology Inc.
LCD1_VDD_EN
S116
Secondary LVDS Channel Power Enable
O
CMOS
1.8V
Runtime
Active high
Only in use, when two separate LVDS ports are
supported, please check Module user manual
LCD1_BKLT_EN
S107
Secondary LVDS Channel Backlight Enable
O
CMOS
1.8V
Runtime
Active high
Only in use, when two separate LVDS ports are
supported, please check Module user manual
LCD1_BKLT_PWM
S122
Secondary LVDS Channel Brightness Control
O
CMOS
1.8V
Runtime
Through pulse width modulation (PWM)
only in use, when two separate LVDS ports are
supported, please check Module user manual
I2C_LCD_DAT
S140
DDC data line used for flat panel detection
and control
I/O OD
CMOS
1.8V
Runtime
PU 2k2
Possible conflict if two LVDS panels are used
I2C_LCD_CK
S139
DDC clock line used for flat panel detection
and control
O OD
CMOS
1.8V
Runtime
PU 2k2
Possible conflict if two LVDS panels are used
4.3.1.2
eDP mode (build option)
Name
Pin #
Description
I/O
Type
I/O
Level
Power
Domain
PU / PD
Comments
e
eDP0_TX0-
e
eDP0_TX1-
e
eDP0_TX2-
e
eDP0_TX3-
S125
S126
S128
S129
S131
S132
S137
S138
Primary 4-Lane eDP Differential Pair Data Lines
O DP
Runtime
AC coupled off Module
100 nF DC blocking capacitors
shall
be placed
on the Carrier.
e
eDP0_AUX-
S134
S135
Primary Bidirectional Channel used for Link
Management and Device Control
I/O DP
Runtime
AC coupled off Module
LCD0_VDD_EN
S133
Primary Panel Power Enable
O
CMOS
1.8V
Runtime
Active high
LCD0_BKLT_EN
S127
Primary Panel Backlight Enable
O
CMOS
1.8V
Runtime
Active high
Summary of Contents for SMARC MODULE LEC-EL
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