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Operation
Theory
PCI-9524
ADLINK Technology Inc.
User’s Manual
Copyright 2008
4.2.12 Data Transfer Modes
Fast-polling data transfer (non-buffering programmed I/O)
The fast-polling mode in PCI-9524 benefits timing sensitive appli-
cations such as servo-control-loops that require retrieving the lat-
est data without FIFO buffering latency.
PCI-9524 continuously updates the latest acquired data onto a
data port for that specific channel. In other words, there are eight
separate data ports holding the latest converted data for analog
input channels 0 to 7. When auto-scan is enabled, users can poll
the data ports in any sequence and guarantee that only the latest
data is retrieved. Data not retrieved in time by users are overwrit-
ten by new data without notice.
As the polling rate of a PC may go much faster than the data rate,
it is possible that users get multiple identical data before a new
conversion has completed. A 'Data Refreshed' bit in the raw data
(see Section 4.2.10) indicates whether AI data has been updated
or not since its last fast-polling data transfer. This bit helps to save
computation power which allows the close-loop control algorithm
update to control outputs only when new data arrives.
Bus-mastering DMA data transfer
PCI bus-mastering DMA is essential for continuous data stream-
ing, as it helps to achieve full potential PCI bus bandwidth, and
also to improve bus efficiency. The bus-mastering controller con-
trols the PCI bus when it becomes the master of which, and the
host CPU is free of burden since data are directly transferred to
the host memory without intervention. Once analog input opera-
tion begins, the DMA returns control of the program. During DMA
transfer, the hardware temporarily stores acquired data in the on-
board AD Data FIFO, and then transfers the data to a user-defined
DMA buffer in the computer.
