ADLINK Technology NuDAQ ACL-8454, User Manual

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Registers Format
3
Registers Format
This chapter describes details of the register format of the ACL-
8454. This information is quite useful for the programmer who wish
to handle the card by low-level program.
In addition, the low level programming is introduced. This
information can help the beginners to manipulate the ACL-8454 in
the shortest learning time.
3.1 I/O Port Address
The ACL-8454 requires 6 consecutive addresses in the PC I/O
address space. There are four 8254 chips in ACL-8454, however,
these 8254 chips use the sam e I/O address. Two chip select bits
are used to select active chip. The Table 3.1 shows the I/O address
of each register with respect to the base address.
I/O Address Write Read
Base + 0 Counter 0 Counter 0
Base + 1 Counter 1 Counter 1
Base + 2 Counter 2 Counter 2
Base + 3 Mode Control No use
Base + 4 Chips select DI low byte
ECLK1~4, ExtG1~4
Base + 5 Digital Output DI high byte
ECLK7~10, ExtG7~10
Table 3.1. I/O Address Map of ACL-8454