ADLINK Technology NuDAQ ACL-8454, User Manual

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Installation
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15
CLK1
COUT1
GATE1
Counter #1
CLK2
COUT2
GATE2
Counter #2
CLK3
COUT3
GATE3
Counter #3
8254 Chip #1
CLK4
COUT4
GATE4
Counter #4
1 MHz COUT5
Counter #5
COUT5
COUT6
Counter #6
8254 Chip #2
CLK7
COUT7
GATE7 Counter #7
CLK8
COUT8
GATE8
Counter #8
CLK9
COUT9
GATE9 Counter #9
8254 Chip #3
CLK10
COUT10
GATE10 Counter #10
COUT11
COUT11
COUT12
Counter #12
8254 Chip #4
Counter #11
C
G
O
C
G
C
G
C
G
C
G
C
G
C
G
C
G
C
G
C
G
C
G
C
G
O
O
O
O
O
O
O
O
O
O
O
'H'
'H'
'H'
'H'
1M Hz
Figure 2.8 Counters Architectural
Independent Counters (Counter #1~#4, & Counter #7~#10)
The Counter #1 to Counter #4 and Counter #7 to Counter #10 are
independent because the clock source and gate control of those
counters can be set independently. These 8 counters are named as
independent counters.
CLK1
COUT1
GATE1
Counter #1
8254 Chip #1
C
G
O
Figure 2.9 Example of ‘independent counters’
Cascaded Counters
The connection of Counter #5, #6 and Counter #11, #12 are different
with other independent counters. These four counters are named as
cascaded counters because the clock sources of counter #5 and
#11 come from fixed
1 MHz and their output are cascaded to counter
#6 and #12 respectively. In fact, counter #5, #6 and counter #11, #12
are designed for frequency divider by using 8254's square wave
generator mode. The gate of these counters keep at 'H' level for
enabling counters all the time. The
COUT6 and COUT12 can
precisely generate frequency upper to 250 KHz and lower to
0.000233 Hz. Note that the signals
COUT6 and COUT12 can also