ADLINK Technology LEC-BTS, Technical Reference

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16 Interfaces
P49 SATA0_TX- (Differential SATA 0 transmit
data Pair; 0.1 uF 0402 capacitor on
module) S50 I2S2_LRCK (Left & Right audio
synchronization clock)
P50 GND S51 I2S2_SDOUT (Digital audio output)
P51 S (Differential SATA 0 receive
data Pair; 0.1 uF 0402 capacitor on
module) S52 I2S2_SDIN (Digital audio input)
P52 SATA0_RX- (Differential SATA 0 receive
data Pair; 0.1 uF 0402 capacitor on
module) S53 I2S2_CK (Digital audio clock)
P53 GND S54 SATA_ACT# (Active low SATA activity
indicator If implemented, able to sink 24mA
or more Carrier LED current)
P54 SPI1_CS0# (SPI1 Master Chip Select 0
output) S55 Not connected
P55 Not connected S56 Not connected
P56 SPI1_CK (SPI1 Master Clock output) S57 Not connected
P57 SPI1_DIN (SPI1 Master Data input [input
to CPU, output from SPI device]) S58 Not connected
P58 SPI1_DO (SPI1 Master Data output
[output from CPU, input to SPI device]) S59 Not connected
P59 GND S60 Not connected
P60 USB0+ (Differential USB0 data pair) S61 GND
P61 USB0- (Differential USB0 data pair) S62 AF (maps to USB3_TX_P on the
SOC)
P62 USB0_EN_OC# (Pulled low by Module
OD driver to disable USB0 power. Pulled
low by Carrier OD driver to indicate over-
current situation. A pull-up is present on
the Module to a 3.3V rail. The pull-up rail
may
be switched off to conserve power if
the USB port is not in use. Further details
may be found in Section 4.12.4 of
SMARC
Specification.
)
S63 AFB_DIFF0- (maps to USB3_TX_N on the
SOC)
P63 USB0_VBUS_DET (USB host power
detection when this port is used as a
device) S64 GND
P64 USB0_OTG_ID (USB OTG ID input,
active high) S65 AF (maps to USB3_RX_P on the
SOC)
P65 USB1+ (Differential USB1 data pair) S66 AFB_DIFF1- (maps to USB3_RX_N on the
SOC)
P66 USB1- (Differential USB1 data pair) S67 GND
P67 USB1_EN_OC# (Pulled low by Module
OD driver to disable USB1 power. Pulled
low by Carrier OD driver to indicate over-
current situation. A pull-up is present on
the Module to a 3.3V rail. The pull-up rail
may
be switched off to conserve power if
the USB port is not in use. Further details
may be found in Section 4.12.4 of
SMARC
Specification.
)
S68 AF (maps to USB_D0_P on the
SOC)
P68 GND S69 AFB_DIFF2- (maps to USB_D0_N on the
SOC)
Table 3-2: SMARC P-S Connector (GF1) Signal Descriptions (Continued)
Pin # Primary (Top Side) Pin # Secondary (Bottom Side)