ADLINK Technology HPERC-IBR-MC, User Manual

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List of Figures vii
HPERC-IBR-M
List of Figures
Figure 1-1: HPERC-IBR-M Block Diagram.........................................................................................4
Figure 1-2: i7-3517UE Peak In-Rush Current and Duration (without GPGPU) ..................................5
Figure 1-3: HPERC-IBR-M Unit with Accessories ..............................................................................7
Figure 1-4: Top and Front Views of “MH” Enclosure with Mounting Dimensions ...............................9
Figure 1-5: Top and Front Views of “MC” Enclosure with Mounting Dimensions .............................10
Figure 1-6: Bottom View of “MC” Enclosure with Mounting Holes....................................................11
Figure 1-7: Front View of HPERC-IBR-M I/O Panel .........................................................................12
Figure 1-8: P1 Military DC Power In Connector Pin Locations.........................................................13
Figure 1-9: P2 and P3 Military Interface Connector Pin Locations...................................................14