Chapter 3
Hardware
CoreModule 720
Reference Manual
27
Video (SDVO/LVDS) Interfaces
The Atom™ E6XXT CPU provides an integrated 2D/3D graphics engine, which supports video decode such
as MPEG2, MPEG4, VC1, WMV9, H.264 (main, baseline at L3 and High-profile level 4.0/4.1), and DivX*
as well as video encode such as MPEG4, H.264 (baseline at L3), and VGA. The CPU supports LVDS and
SDVO display ports, permitting simultaneous, independent operation of two displays. The video interface
features are listed in the following bullets. Refer to
Table 3-10
for definitions of the SDVO pin signals and
Table 3-11
for the LVDS pin signal definitions.
SDVO
:
•
Supports a maximum resolution of 1280 x 1024 at 85Hz (pixel clock rate up to 160MHz)
•
Supports a single channel interface through a 30-pin FPC connector
•
Supports 100MHz to 160MHz derivative clock frequency
•
Supports third-party output formats such as DVI, LVDS, HDMI, TV-Out, and VGA
•
Provides a control bus able to operate at up to 1 MHz
LVDS
:
•
Supports a maximum resolution of 1280 x 768 at 60Hz (pixel clock rate up to 80MHz)
•
Supports minimum pixel clock rate of 19.75MHz
•
Supports a single channel interface through a 20-pin header
•
Supports pixel color depths of 18 and 24 bits
•
Supports 20MHz to 80MHz derivative clock frequency
Table 3-10
lists the pin signals of the SDVO FPC connector, which provides 30 pins in a single row with
0.020" (0.5mm) pitch.
Table 3-10. SDVO Interface Pin Signals (J15)
Pin # Signal
Description
1
GND1
Ground 1
2
SDVOB_CLK-
SDVO B Clock Negative
3
SD
SDVO B Clock Positive
4
GND2
Ground 2
5
SDVOB_GREEN-
SDVO B GREEN Negative
6
SDVO
SDVO B GREEN Positive
7
GND3
Ground 3
8
SDVOB_INT-
SDVO B Input Interrupt Negative
9
SD
SDVO B Input Interrupt Positive
10
GND4
Ground 4
11
SDVOB_BLU-
SDVO B BLUE Negative
12
SD
SDVO B BLUE Positive
13
GND5
Ground 5
14
SDVOB_RED-
SDVO B RED Negative
15
SD
SDVO B RED Positive
16
GND6
Ground 6
17
SDVO_FLDSTALL-
SDVO Input Field Stall Negative
18
SDVO_F
SDVO Input Field Stall Positive
19
GND7
Ground 7
