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4

Introduction

1.6

Functional Block Diagram

Figure 1-1: CM5-P1000 Functional Block Diagram

GPU

N18P-Q1

40W

IFPA

IFPE

PCIe x16 Gen3

PCIE

IFPB

IFPF

SMBus

Power Management (PWR_EN

 PWR_GOOD

WAKE#)

PM

JTAG

SPI

DP Conn 1

DP Conn 2

DP1.4

DP Conn 3

DP1.4

DP Conn 4

DP1.4

DP1.4

GDDR5 8Gb x2

GDDR5
Channel A 3Gbps

memory down

GDDR5 8Gb x2

Channel B 3Gbps

memory down

Fan Conn

SPI

SPI - VBIOS

12V

Summary of Contents for CM5-P1000

Page 1: ...CM5 P1000 NVIDIA Pascal GP107 Quadro P1000 PCIe 104 Graphics Module User s Manual Manual Rev 1 0 Revision Date November 1 2021 Part No 50M 00052 1000...

Page 2: ...ii Revision History Revision History Revision Release Date Description of Change s 1 0 2021 11 01 intitial release...

Page 3: ...of the use or inability to use the product or documentation even if advised of the possibility of such damages Environmental Responsibility ADLINK is committed to fulfill its social responsi bility t...

Page 4: ...ore information go to www P65Warnings ca gov Trademarks Product names mentioned herein are used for identification pur poses only and may be trademarks and or registered trademarks of their respective...

Page 5: ...1 5 Software Support 3 1 6 Functional Block Diagram 4 1 7 Mechanical Dimensions 5 1 8 Ordering Information 8 1 9 Unpacking Checklist 8 1 10 Optional Cooling Solutions 9 2 Interfaces 1 2 1 Board Layout...

Page 6: ...vi Table of Contents Important Safety Instructions 9 Getting Service 13...

Page 7: ...List of Tables vii CM5 P1000 List of Tables Table 1 1 CM5 P1000 Specifications 2 Table 3 1 Thermal Policy 7...

Page 8: ...viii List of Tables This page intentionally left blank...

Page 9: ...igure 1 2 CM5 P1000 Dimensions 5 Figure 1 3 CM5 P1000 Mounting Specifications 6 Figure 1 4 CM5 P1000 PCB Specifications 7 Figure 2 1 CM5 P1000 Top Side Layout 1 Figure 2 2 CM5 P1000 Bottom Side Layout...

Page 10: ...x List of Figures This page intentionally left blank...

Page 11: ...stem Its superior graphics perfor mance GPU computing and video capabilities are the ideal solu tion for performance demanding systems such as digital signage medical image defense and aerospace appli...

Page 12: ...emory GDDR5 Memory 4GB Memory Width 128 bit Bandwidth 96 GB s Physical Dimensions 116 W x 96 D mm Interface PCIe 104 Type 1 Environmental Operating Temp 40 C to 85 C Storage Temp 40 C to 85 C Operatin...

Page 13: ...1 4 X Max pixel clock 1050 MP s X Max bandwidth 25 9 GB s connector Resolution X Up to 5120 x 3200 at 60Hz with 10 bit color depth X Support for High Dynamic Range HDR video 1 5 Software Support X CUD...

Page 14: ...GPU N18P Q1 40W IFPA IFPE PCIe x16 Gen3 PCIE IFPB IFPF SMBus Power Management PWR_EN PWR_GOOD WAKE PM JTAG SPI DP Conn 1 DP Conn 2 DP1 4 DP Conn 3 DP1 4 DP Conn 4 DP1 4 DP1 4 GDDR5 8Gb x2 GDDR5 Channe...

Page 15: ...Introduction 5 CM5 P1000 1 7 Mechanical Dimensions Figure 1 2 CM5 P1000 Dimensions NOTE NOTE All dimensions shown in mm thou 90 17 95 885 115 57 79 375 1 57...

Page 16: ...ng Specifications 0 0 80 01 3150 5 08 200 17 78 700 85 09 3350 97 79 3850 0 0 5 08 200 3 175 125 82 55 3250 85 725 3375 90 805 3575 0 0 2 54 100 5 08 200 85 09 3350 76 2 3000 7 771 305 9 53 771 2117 2...

Page 17: ...n 7 CM5 P1000 Figure 1 4 CM5 P1000 PCB Specifications 0 0 0 0 0 0 4 191 165 9 271 365 C A A A A C C C 6 35 250 3 175 125 Screw Hole A 6 236 2 3 2 126 Screw Hole B 7 275 6 3 2 126 Screw Hole C 6 35 250...

Page 18: ...mal coating please contact your local sales representa tive 1 9 Unpacking Checklist Before unpacking check the shipping carton for any damage If the shipping carton and or contents are damaged inform...

Page 19: ...available for purchase sepa rately Please contact your ADLINK representative for detailed more information and mechanical drawings X CMx P1000TM 00 CM5 P1000 heat spreader 40 C to 85 C P N 91 95291 10...

Page 20: ...tion X CMx P1000TM 20 CM5 P1000 active heat sink 10 C to 70 C P N 91 95291 300E X CMx P1000TM 30 CM5 P1000 active heat sink for ETT testing only requires external 4 pin Molex power 40 C to 85 C P N 91...

Page 21: ...Interfaces 1 CM5 P1000 2 Interfaces 2 1 Board Layout Figure 2 1 CM5 P1000 Top Side Layout LED1 Power on LED LED2 Over temperature LED LED2 LED1 Fan Connector...

Page 22: ...2 Interfaces Figure 2 2 CM5 P1000 Bottom Side Layout DP 2 DP 4 DP 1 DP 3 PCIe 104 Connector External DC Input...

Page 23: ...Connectors Fan Connector 1 25mm pitch wafer External DC Input 2 00mm pitch wafer Pin Signal 1 FAN_ON 2 FAN_TACH 3 12V 4 GND Pin Signal 1 12V 2 12V 3 GND 4 GND NOTE NOTE Use the same power source as 12...

Page 24: ...IFPA_L0_C_N 4 IFPA_L1_C_P 5 GND 6 IFPA_L1_C_N 7 IFPA_L2_C_P 8 GND 9 IFPA_L2_C_N 10 IFPA_L3_C_P 11 GND 12 IFPA_L3_C_N 13 IFPA_AUX_SEL 14 DP_A_CFG2 15 IFPA_AUX_C_P 16 GND 17 IFPA_AUX_C_N 18 IFPA_HPD 19...

Page 25: ...rom S3 and S4 this sequence must be followed Figure 3 1 Power Sequencing 3 2 Module Power Up and Down Issuing the PWR_EN signal powers the CM5 P1000 module down and the system designer can decide whet...

Page 26: ...Down 3 3 Reset Requirements Figure 3 3 Reset Sequencing MODULE INPUT POWER PWR_EN MODULE INTERNAL POWER PWR_GOOD TPVPERL TPERST PG TPERST CLK TFAIL TPVPERL PV TPERST CLK V TPERST PG V TFAIL QV MODULE...

Page 27: ...y Parameter Value Unit Thermal Resistance Junction to Case RJC 0 03 C W Thermal Resistance Junction to PCB Board RJB 3 0 C W GPU Maximum Operating Temperature1 94 C GPU Slowdown Temperature THERM_ALER...

Page 28: ...gs please refer to the CMx SLx Technical Reference Section 4 1 BIOS Setup downloadable from the ADLINK website For BIOS setting information when used with other PCI 104 Express or PCIe 104 SBCs please...

Page 29: ...erature of 50 C X When installing mounting or uninstalling removing device or when removal of a chassis cover is required for user ser vicing Z Turn off power and unplug any power cords cables Z Reins...

Page 30: ...f breakage X Disconnect the power supply cord before loosening the thumbscrews and always fasten the thumbscrews with a screwdriver before starting the system up X It is recommended that the device be...

Page 31: ...ng this surface could result in bodily injury To reduce risk allow the surface to cool before touching RISQUE DE BR LURES Ne touchez pas cette surface cela pourrait entra ner des blessures Pour viter...

Page 32: ...12 Important Safety Instructions This page intentionally left blank...

Page 33: ...0200 Toll Free 1 800 966 5200 USA only Fax 1 408 600 1189 Email info adlinktech com ADLINK Technology China Co Ltd 300 Fang Chun Rd Zhangjiang Hi Tech Park Pudong New Area Shanghai 201203 China Tel 8...

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