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ADLINK Technology CM1-86DX2, Technical Manual

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ADLINK Technology CM1-86DX2 Technical Manual Download Page 46

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Module Description

3.13 BMC Service Connector (X24)

This connector is only needed in case of updates of the BMC. For further information, please
contact our support team. In most cases this connector is not needed by the user and is
intended for production testing.

X24 offers the opportunity to connect I2C devices to the CM1-86DX2.

3.14 JTAG (X16)

The CM1-86DX2 makes the JTAG port of the SoC accessible to the user. This JTAG is only sup-
ported through DMP’s own JTAG tools.

Currently, only BIOS recovery is possible through DMP’s JTAG tools.

The JTAG port of the Vortex86DX2 is an SIL8, 2.0 mm header located next to the power con-
nector.

3.15 User GPIO (X17) and Analog-In (X21)

The CM1-86DX2 offers one configurable I/O-port with 8 5V tolerant IOs on connector X17 and
8 single-ended analog inputs with 10-bit effective resolution and a sample rate of 
100 kSamples/s on connector X21. These analog inputs tolerate a maximum input voltage of
3.6V, while the reference voltage is 3.3V.

This reference voltage is accessible through the X21 connector.

Features of the integrated ADC

Resolution: 

11 bit (10 bit effective)

Integral Nonlinearity (INL):

±2 LSB

Differential Nonlinearity (DNL):

±1 LSB

Input Capacitance (typ.):

102.4 pF

Input Clock Frequency (max.):

1.6 MHz

Sample Frequency (max.):

100 kHz

Signal to Noise Ratio plus Distortion Ratio (max.) (@fIN=50 kHz):

61.96 dB

ADC channel 7 is shared with the integrated temperature sensor of the SoC

Table  3-24: BMC Service Connector (X24)

Pin

I2C0, X24 (3.3 V)

6

SCL

7

SDA

10

GND

If you are using I2C in your own application and want to use SEMA at the same time, 
make sure not to override current data transfers from either SEMA or the user application 
on the bus. This can lead to application failures.

Summary of Contents for CM1-86DX2

Page 1: ...Advance Technologies Automate the World CM1 86DX2 PC 104 Single Board Computer Technical Manual P N 50 1Z149 1030 Rev 4 00 ...

Page 2: ...rms and Conditions of Sale for such prod ucts ADLINK assumes no liability whatsoever and ADLINK disclaims any express or implied warranty relating to sale and or use of ADLINK products including liability or warranties relat ing to fitness for a particular purpose merchantability or infringement of any patent copy right or other intellectual property right If you intend to use ADLINK products in o...

Page 3: ...ardware Setup 13 3 Module Description 15 3 1 Processor and Chipset SoC System on a Chip 15 3 2 Processor functional blocks 16 3 3 Graphics Controller 16 VGA Features 16 2D Features 17 DMA Features 17 Video Display Features 17 Power Management Features 18 Video Post Processor Features 18 Capture Features 18 Command Queue Features 18 VGA Header X8 19 LVDS Configuration 19 LVDS Color Mapping 20 LVDS ...

Page 4: ... 33 3 9 Serial Ports 34 Utility COM Ports 34 COM Headers Ports 1 2 3 4 X2 X3 X4 X5 34 RS485 422 Termination 35 3 10 LPT Interface X19 36 LPT Header X19 36 3 11 MiniPCI Express Interface X10 37 MiniPCIe Card Mode Jumper Header X20 38 3 12 PC 104 Bus Interface 38 PC 104 Bus Connector X14 39 3 13 BMC Service Connector X24 40 3 14 JTAG X16 40 3 15 User GPIO X17 and Analog In X21 40 Features of the int...

Page 5: ...ction Counter Registers 65 Timer Counter Registers 65 Interrupt Control Registers 66 Keyboard Mouse Control Registers 66 NMI Status and Control Register 66 Watchdog0 Control Registers 66 Watchdog1 Control Registers 67 Indirect Access Registers 67 CMOS Memory RTC Registers 67 System Control Register 67 DOS 4Gpage Access Registers 67 Spare Registers 68 4 8 Interrupts 68 4 9 DMA Channels 69 4 10 Cont...

Page 6: ...vi ...

Page 7: ...nnections onboard The board provides two Ethernet ports 1x Gigabit and 1x 100Megabit four RS232 RS422 RS485 serial ports one USB 2 0 host controller one USB 1 1 host controller to handle the communication with external devices and PS 2 connectors for keyboard and mouse A first generation SATA interface allows the connection of hard disk or CD drives Appli cations that require non moving storage ca...

Page 8: ... 1GBit 1x Ethernet 100MBit 1x SATA First Generation 1x MicroSD HC PS 2 Keyboard Mouse 4 x USB 2 0 ports Nr 4 only with MiniPCIe extension card 4 x RS232 RS485 1x LPT 5 1 channel audio analog SPDIF 1x VGA 1x 18 24 Bit LVDS for displays alternatively to VGA MISC signals external power button I C bus 3 3 V speaker 5 V external reset button external battery connector 8 x Analog input with 10 bit res o...

Page 9: ...I2C mPCIe or mSATA ISA Optional HD Audio RS232 485 PS 2 SATA Option SATA or mSATA LCD LVDS VGA PC 104 Inverter Backlight 2x COM Option 4x COM Speaker 512MB DDR2 400 Memory Down VGA LPT I2C 8x A D Input ADC I2C DS90C385A LCD to LVDS JTAG 8x GPIO 3x USB 2 0 Optional MicroSD Socket i210IT Ethernet PCIe Optional GbE ETH PCIe 1x USB 2 0 Optional 1GB DDR2 400 CM1 86DX2 ...

Page 10: ...f memory Operating temp range 40 C 85 C CPU clock 800 MHz Memory clock 300 MHz 702 0020 10 CM1 DX2 PC 104 CPU board with DMP Vortex86 DX2 incl heat sink 512 MByte Memory Operating temp range 0 C 60 C CPU clock 1 GHz Memory clock 333 MHz 802 0020 10 CM1 DX2 PC 104 CPU board with DMP Vortex86 DX2 incl heat sink 512 MByte Memory Operating temp range 20 C 70 C CPU clock 1 GHz Memory clock 333 MHz 902 ...

Page 11: ...lvin per 30 minutes Humidity relative 10 90 non condensing Pressure 450 hPa 1100 hPa Table 1 5 Non Operating Storage Transport Temperature range 40 C 85 C Temperature change max 10 Kelvin per 30 minutes Humidity relative 5 95 non condensing Pressure 450 hPa 1100 hPa Table 1 6 HALT Parameters Cold Temperature Step Stress The board remained operational during test down to 100 C starting at 20 C and ...

Page 12: ... 32 and 40 grams from the first to the fifth thermal cycle and 10 minute dwells at each extreme temperature Table 1 7 Mean Time Between Failures MTBF at 40 C 1 246 692 Hrs Table 1 8 Mechanical Dimensions L x W 90 6mm x 95 2mm Height Max 31mm on top side above PCB including heat sink Weight 98 grams without MiniPCIe extension card Mounting 4 mounting holes ADLINK strongly recommends plastic spacers...

Page 13: ...anical dimensions top side 35 50 81 10 18 31 7 12 6 76 54 81 36 81 72 81 88 75 72 81 88 75 17 36 17 36 73 11 62 87 62 87 87 85 62 18 21 44 07 10 43 1 64 8 2 1 10 43 96 62 92 1 90 81 10 85 85 62 62 90 2 07 30 03 1 60 42 23 CM1 86DX2_mech_dwg_top_b ...

Page 14: ...8 Introduction Bottom Figure 1 3 Mechanical dimensions bottom side 74 07 56 68 13 90 4 05 40 10 23 35 53 95 3 50 20 20 70 45 90 17 05 18 60 50 15 96 CM1 86DX2_mech_dwg_top_b CM1 86DX2_mech_dwg_bottom_a ...

Page 15: ...logy 119A 92A00 R02 X11 Bottom 7 pin standard right angle SATA connector MOLEX 47080 4001 X12 Bottom 30 pin 1 25mm right angle single row LVDS header HIROSE DF14 30P 1 25H X13 Bottom 8 pin 1 25mm right angle single row backlight header HIROSE DF13 8P 1 25H X14 Bottom 8 pin 1 25mm right angle single row USB header ports 0 1 HIROSE DF13 8P 1 25H X15 Bottom 10 pin 1 25mm right angle single row miscel...

Page 16: ... top side The yellow arrow heads next to the connectors in this illustration denote pin 1 Key X1 Utility X2 X3 X4 X5 COM X6 Gigabit Ethernet X7 Fast Ethernet X8 VGA CM1 86DX2_conn_top_b X16 C0 D0 X9 PC 104 X16 JTAG X19 Parallel X23 Audio X25 ATX Power ...

Page 17: ...Getting Started 11 CM1 86DX2 Bottom Figure 2 2 Header locations bottom side The yellow arrow heads next to the connectors in this illustration denote pin 1 ...

Page 18: ...e WD LED10 TOP Red LED lights up when Watchdog was triggered Can only be reset by a power off sequence ETH0_LINK_ACT LED3 TOP Yellow LED shows link and traffic on Ethernet0 100 MBit s ETH1_LED_100 LED9 TOP Green LED shows 100MBit link on Ethernet1 1 GBit s ETH1_LED_1000 LED1 TOP Yellow LED shows 1GBit link on Ethernet1 1 GBit s ETH1_LED_ACT LED2 TOP Yellow LED shows traffic on Ethernet1 1 GBit s L...

Page 19: ... be automatically loaded at boot time The CM1 86DX2 boots from CD drives USB floppy USB stick hard disk or µSD Card Provided that any of these is connected and contains a valid operating system image the display then shows the boot screen of your operating system The CM1 86DX2 needs adequate cooling measures depending on the desired operating tem perature range Using the board without cooling coul...

Page 20: ...14 Getting Started ...

Page 21: ... s DDR2 ROM controller ISA I2C SPI IPC Internal Peripheral Controllers with DMA and interrupt timer counter included Fast Ethernet FIFO UART USB2 0 Host IDE SATA controller and two Watchdog Timers within a single 720 pin BGA package to form a system on a chip SoC The SoC provides an ideal solution for embedded system and communications products such as thin clients NAT routers home gateways access...

Page 22: ...cs Controller This section lists the features of the Vortex86DX2 SoC integrated graphics engine VGA Features Fully IBM VGA compliant Resolutions up to 1920x1440 One dedicated PLL for video clock generation 2D graphics support Supports 64 x 64 hardware overlay cursor with mono and color formats RGB analog output Up scaling Scaling down display resolution 1024x768 support Supports 8 Bit DAC UMA arch...

Page 23: ...Mono Source form system memory 2D rotation display resolution 1024x1024 support Programmable 256K 512K 1M 2M off screen command buffer Integrated 32 stages of hardware command queue for 2D command pre fetch from off screen memory space of frame buffer Integrated 32x64 source buffer and destination buffer to improve 2D engine performance Integrated 32x98 post write buffer to improve 2D engine perfo...

Page 24: ...rts Input YUV format YUYV or UYVY YUV2RGB function can be disabled Software clear capture interrupt BT 656 use header information to setting VBI or ANC capture range 3 active video frame buffer 2 VBI or ANC frame buffer Programmable color space conversion coefficient Supports coring function Supports minify Command Queue Features Programmable max 8M off screen command queue buffer 8 bytes aligned ...

Page 25: ...ge 23 for Display and Backlight Voltage jumper signals LVDS support can be configured within the BIOS Using LVDS disables the VGA port on the CM1 86DX2 You can use a CRT or an LVDS panel only exclusively from each other Table 3 1 VGA Header Signals X8 Pin Signal Pin Signal 1 Red 2 GND 3 Green 4 GND 5 Blue 6 VGA_DDC_CLK 7 HSYNC 8 VGA_DDC_DATA 9 VSYNC 10 GND You can switch the video output at startu...

Page 26: ...20 Module Description LVDS Color Mapping ...

Page 27: ...2 Pin Signal Pin Signal 1 VCC_LCD 2 VCC_LCD 3 GND 4 GND 5 LVDS_L3n 6 LVDS_L3p 7 LVDS_LCLKn 8 LVDS_LCLKp 9 GND 10 LVDS_L2n 11 LVDS_L2p 12 LVDS_L1n 13 LVDS_L1p 14 LVDS_L0n 15 LVDS_L0p 16 GND 17 n c 18 n c 19 n c 20 n c 21 GND 22 n c 23 n c 24 n c 25 n c 26 n c 27 n c 28 GND 29 reserved 30 reserved The maximum current on all supply pins is 1A ...

Page 28: ...DF13 8 pin header Adapter cable n a This voltage can be selected using the jumper Backlight shown on next table Table 3 3 Backlight Header Signals X13 Pin Signal Pin Signal 1 12 V 2 12 V 3 5 V 4 5 V 5 EN 6 VCC 7 GND 8 GND The maximum current on all supply pins is 1A ...

Page 29: ... Ethernet functionality Features of the 10 100 Mbit Controller Integrated Fast Ethernet MAC and PHY 10 Mbps and 100 Mbps operation Supports 10 Mbps and 100 Mbps N way Auto negotiation PCI local bus single chip Fast Ethernet Provides PCI bus master data transfers PCI memory space or I O space mapped data transfer of operational registers Supports digital and analog loop back capability Half Full du...

Page 30: ...es Advanced cable diagnostics auto MDI X ECC error correcting memory in packet buffers IEEE 802 3az Energy Efficient Ethernet EEE Wake on LAN 100 Mbit Ethernet Connector X7 Connector type IDC10 pin header 2 54 mm Adapter cable Article number 862 0005 10 The CM1 86DX2 512 model does not offer the USB function on the X7 connector Table 3 5 Fast Ethernet Header Signals X7 Pin Signal Pin Signal 1 ETH0...

Page 31: ...age of 5 volts The generated 3 3 volts are available on the connectors Flat Panel LVDS and AnalogIn Table 3 6 Gbit Ethernet Header Signals X6 Pin Signal Pin Signal 1 ETH1_MX0n 2 ETH1_MX0p 3 ETH1_MX1n 4 ETH1_MX1p 5 ETH1_PE Protection Earth for shielded Ethernet cables 6 n c 7 ETH1_MX2n 8 ETH1_MX2p 9 ETH1_MX3n 10 ETH1_MX3p This 3 3V must not be used to supply external electronic devices with high po...

Page 32: ... Power Connector Signals X25 Pin Signal standard Signal 5V only 1 5V 5V 2 GND GND 3 5V 5V 4 GND GND 5 5V 5V 6 5V Standby NC 7 GND GND 8 PSON GND 9 PWROK NC 10 NC NC 11 GND GND 12 12V only for PC104 slot and backlight power supply NC 13 12V only for PC104 slot and backlight power supply NC 14 GND GND 15 12V only for PC104 slot NC The default cable adapter supports the connection of 12V power supply...

Page 33: ...e MiniPCIe socket X10 but the mSATA device will use the SATA controller exclusively and no external SATA device will function The SATA controller can operate in two modes SATA in legacy mode SATA in native mode default setting IDE Controller Features Compatible with the ATA ATAPI 6 specification and supports two IDE channels with up to four drives Programmable active pulses and recovery time for d...

Page 34: ...Adapter cable n a MicroSD Connector X18 Connector type MicroSD Table 3 8 SATA Connector Signals X11 Pin Signal 1 GND 2 Data_TX 3 Data_TX 4 GND 5 Data_RX 6 Data_RX 7 GND Table 3 9 MicroSD Connector Signals X18 Pin Signal 1 D2 2 D3 3 CMD 4 VDD 5 CLK 6 GND 7 D0 8 D1 ...

Page 35: ...a 3 volt model CR1225 The time and date will be lost if the power supply falls to 2 5 volts For battery life calculation worst case 3 µA 25 C are required when the board is not running That value can rise depending on the connected cables and higher temperatures Table 3 10 PS 2 Keyboard and Mouse Signals X1 Pin Signal Pin Signal 1 Speaker 2 Mouse Clock 3 Reset In 4 Mouse Data 5 KB Data 6 KB Clock ...

Page 36: ...Power Button Signals X1 Pin Signal Pin Signal 1 Speaker 2 Mouse Clock 3 Reset In 4 Mouse Data 5 KB Data 6 KB Clock 7 GND 8 5V Standby 9 Ext Battery 10 Power Button Table 3 13 Reset Switch Signals X1 Pin Signal Pin Signal 1 Speaker 2 Mouse Clock 3 Reset In 4 Mouse Data 5 KB Data 6 KB Clock 7 GND 8 5V Standby 9 Ext Battery 10 Power Button Table 3 14 Speaker Signals X1 Pin Signal Pin Signal 1 Speaker...

Page 37: ...oller The CM1 86DX2 uses three of the four ports They are available on two USB connectors one providing two ports and one providing one port USB 2 0 supports a USB keyboard running under MSDOS without special driver software The fourth USB port is routed to the MiniPCIe socket X10 and requires a USB extension card USB 2 0 Ports 0 1 Header X14 Connector type Hirose DF13 8 pin Adapter cable Article ...

Page 38: ...C886 is a high performance 7 1 2 Channel High Definition Audio Codec The following I Os are used by the CM1 86DX2 Analog Input All ADC support 44 1 kHz 48 kHz 96 kHz and 192 kHz sampling rates Microphone left and right Line In left and right Analog output All ADC support 44 1 kHz 48 kHz 96 kHz and 192 kHz sampling rates Front left and front right Rear left and rear right Center and subwoofer Digit...

Page 39: ...r 2 54mm Adapter cable Article number 862 0086 10 Table 3 17 Audio Header Signals X23 Pin Signal Pin Signal 1 LineOut_R 2 LineOut_L 3 Surround_R 4 Surround_L 5 LFE 6 Center 7 GND_Audio 8 GND_Audio 9 LineIn_R 10 LineIn_L 11 MIC_R 12 MIC_L 13 GND 14 GND 15 S P_DIF_IN 16 S P_DIF_OUT ...

Page 40: ...address 3F8h 2F8h 3E8h 338h 2E8h 238h 328h 228h 220 IRQ 3 4 5 6 7 9 10 11 12 14 15 Bits per Second 2400 4800 9600 19200 38400 56700 115200 The default values are COM1 enabled 3F8h IRQ4 COM2 enabled 2F8h IRQ3 COM3 disabled COM4 disabled The maximum supported baud rates are 0 75 Mbit s in RS485 high speed mode 115 2 Kbit s in RS232 mode The baud rates can be configured by the user application Utilit...

Page 41: ... Switch from the off posi tions to on positions So COM1 and COM3 use positions 1 2 each and COM2 and COM4 use positions 3 4 each of the DIP Switch SW2 and SW1 When the termination is set the differential pairs are terminated with 120 Ω between them e g RX and RX in the following illustration Additionally positive negative receive lines are pulled up down with 10 kΩ to 5V GND in order to protect th...

Page 42: ...le connector 2 54 mm Table 3 19 BMC Service Connector X24 LPT Parameter Possible Settings Base Address Disabled 0x378 and 0x278 Mode BPP EPP 1 9 and SPP ECP ECP and EPP 1 9 SPP EPP 1 7 and SPP ECP and EPP 1 7 IRQ Disabled IRQ 3 IRQ 4 IRQ 5 IRQ 6 IRQ 7 IRQ 9 IRQ 10 IRQ 11 IRQ 12 IRQ 14 and IRQ15 Table 3 20 LPT Header Signals X19 Pin Signal Pin Signal 1 Strobe 2 Auto LF 3 Data0 4 Error 5 Data1 6 Ini...

Page 43: ...ard type fails you can force the mode of operation with the jumper header X20 Table 3 21 MiniPCIe Interface X10 Pin Signal Pin Signal 1 n c 2 3 3 V 3 n c 4 GND 5 n c 6 1 5 V 7 CLKREQ 8 n c 9 GND 10 n c 11 PCIE1_CLK_n 12 n c 13 PCIE1_CLK_p 14 n c 15 GND 16 n c Mechanical Key 17 Reserved 18 GND 19 Reserved 20 n c 21 GND 22 PERST 23 PCIE1_RX_n 24 3 3 V 25 PCIE1_RX_p 26 GND 27 GND 28 1 5 V 29 GND 30 I...

Page 44: ...ait state for ISA cycles Support for I O recovery time for back to back I O cycles The following table shows the pin assignment of the PC 104 connector Table 3 22 PCIe Mini Card Jumper Signals X20 Pin Signal Pin Signal 1 3 3V S 2 SSD SEL 3 Detection from socket 4 SSD SEL 5 GND 6 SSD SEL Depending on the board used in the Mini PCI Express socket the automatic switching between Mini PCI Express and ...

Page 45: ...IRQ10 LA22 12 A19 SMEMR 4 IRQ11 LA21 13 A18 IOW 5 IRQ12 LA20 14 A17 IOR 6 IRQ15 LA19 15 A16 DACK3 7 IRQ14 LA18 16 A15 DRQ3 8 DACK0 LA17 17 A14 DACK1 9 DRQ0 MEMR 18 A13 DRQ1 10 DACK5 MEMW 19 A12 REFRESH 11 DRQ5 SD8 20 A11 SYSCLK 12 DACK6 SD9 21 A10 IRQ7 13 DRQ6 SD10 22 A9 IRQ6 14 DACK7 SD11 23 A8 IRQ5 15 DRQ7 SD12 24 A7 IRQ4 16 5V SD13 25 A6 IRQ3 17 MASTER SD14 26 A5 DACK2 18 GND SD15 27 A4 TC 19 G...

Page 46: ...r X17 and 8 single ended analog inputs with 10 bit effective resolution and a sample rate of 100 kSamples s on connector X21 These analog inputs tolerate a maximum input voltage of 3 6V while the reference voltage is 3 3V This reference voltage is accessible through the X21 connector Features of the integrated ADC Resolution 11 bit 10 bit effective Integral Nonlinearity INL 2 LSB Differential Nonl...

Page 47: ...The 8 analog channels are multiplexed through one conversion engine So the sample rate is shared This means the more channels that are active the less the individual sample rate per channel will be Table 3 25 GPIO Signals X17 and X21 Pin GPIO COM6 X17 Pin Analog In X21 1 GP1_VCC 5 0 V 1 ADC_VCC 3 3 V 2 GND 2 GND 3 GP10_DCD6 3 ADC0 4 GP11_SOUT6 4 ADC1 5 GP12_RTS6 5 ADC2 6 GP13_RI6 6 ADC3 7 GP14_SIN...

Page 48: ...user applications This Bus can be used to connect other devices which communicate over the I2C Bus The High Level of this bus is 3 3V Table 3 26 I2C Signals X21 Pin I2C0 X21 1 ADC_VCC 3 3 V 2 GND 3 ADC0 4 ADC1 5 ADC2 6 ADC3 7 ADC4 8 ADC5 9 ADC6 10 ADC7 11 I2C0_CLK 12 I2C0_DATA ...

Page 49: ...S RAM The soldered battery will provide power to store that information for over two years without board activation Configuring the BIOS Pressing DEL during power up starts the BIOS setup utility Pressing F11 during power up starts the boot menu Pressing END during power up returns settings to default Main screen of the BIOS The main screen of the BIOS SETUP UTILITY gives you a quick overview of t...

Page 50: ...r configuration Remote access configuration USB controller configuration and ACPI configuration IDE Configuration defines which parts of the controller are activated and what settings are used The recommended settings are shown below The use of inappropriate values on any of the following advanced settings below may cause system to malfunction ...

Page 51: ... CM1 86DX2 Recommended IDE settings for booting Windows IDE Operate Mode Native Mode Standard IDE Compatible Disabled Recommended IDE settings for booting Linux IDE Operate Mode Native Mode Standard IDE Compatible Enabled ...

Page 52: ...46 Using the Module ...

Page 53: ...Using the Module 47 CM1 86DX2 PCIPnP ...

Page 54: ...48 Using the Module ...

Page 55: ...e is attached to the CM1 86DX2 you can select from the first Boot Set tings screen the boot order the drives are scanned for a bootable OS image The Boot Settings Configuration allows you to configure the boot behavior for a graphically enhanced BIOS SETUP UTILITY ...

Page 56: ...50 Using the Module Chipset screen ...

Page 57: ...Using the Module 51 CM1 86DX2 ...

Page 58: ...52 Using the Module ...

Page 59: ...Using the Module 53 CM1 86DX2 Security screen ...

Page 60: ...nitoring of CPU and Board temperature Minimum and maximum temperature values of CPU and board are stored in flash Power monitor Reads the current drawn by the board and reports the nominal operating voltage Power cycles counter Boot counter Boot counter is increased after a HW or SW Reset or after a successful power up Watchdog Timer Set Reset Disable Watchdog Timer System Restart Cause Power loss...

Page 61: ...ts drawn by the board The values are sampled every 250ms The order of the four values is NOT in relationship to time The access to the BMC may increase the drawn current of the whole system In this case you still have three samples without the influence of the read access Main Current MSB_n 8 LSB_n 8 06mA TS Events TS is activated by a temperature sensor when a device reaches its critical temperat...

Page 62: ...atchdog registers If this function is used by user application the application has to provide all logging functionality if desired The BMC Watchdog activation is caused by under voltage protection The Watchdog LED gets flashed after restart but only if the power supply reaches 4 2V 4 4 Temperature Sensors The CM1 86DX2 provides two temperature sensors One is offered from the SoC and one from the B...

Page 63: ...de sys io h include stdio h include stlib h include unistd h GPIO registers define GPIO1X_DAT0x99 default address for gpio port1 data define GPIO1X_DIR0x79 default address for gpio port1 direction int main if iopl 3 0 printf IOPL error n return 1 outb 0xff GPIO1X_DIR set all pins of gpio port1 to output set 0x00 for all input outb 0x55 GPIO1X_DAT write out 0x55 to gpio port1 Please note that some ...

Page 64: ...data_reg 0x data_reg dx2_gp 3 o data_reg GPA6 COM3 and GPA7 COM4 set direction of RS232 485 mode switch GPIOs to output dir_reg dx2_gp a d g echo RAW Value for dir_reg 0x dir_reg dir_reg printf 02x 0x dir_reg 0xc0 echo new Value for dir_reg 0x dir_reg dx2_gp a d dir_reg set RS485 mode output 1 data_reg dx2_gp a i 1 echo RAW Value for data_reg 0x data_reg data_reg printf 02x 0x data_reg 0x3F echo n...

Page 65: ...trig 0xD0 0xD0 system reset outb 0x38 WDT0_INDEX outb trig WDT0_DATA enable wdog 0x37 outb 0x37 WDT0_INDEX wdog_en inb WDT0_DATA wdog_en 0x40 bit6 1 enable WDT0 outb 0x37 WDT0_INDEX outb wdog_en WDT0_DATA printf Watchdog active resetting counter Press CLRT C to stop resetting n reset counter 0x3C while 1 outb 0x3C WDT0_INDEX reset_cntr inb WDT0_DATA reset_cntr 0x40 bit6 1 reset timer counter outb ...

Page 66: ...system reset outb trig 0xa9 enable wdog 0xa8 wdog_en inb 0xa8 wdog_en 0x40 bit6 1 enable WDT1 outb wdog_en 0xa8 printf Watchdog active resetting counter Press CTRL C to stop resetting n reset timer counter 0xa8 while 1 reset_cntr inb 0xa8 reset_cntr 0x40 bit6 1 reset counter outb reset_cntr 0xa8 return 0 Please note that this source code example is provided for a system running Linux For other ope...

Page 67: ...data register define ADC_READY_MASK 0x01 define ADC_CH_MASK 0xFF bits 15 13 represent the ADC channel define ADC_VAL_MASK 0x07FF bits 10 0 represent the result value SB function 0 addresses and offsets base address of 32 bit wide On Chip Device Control Register in South Bridge Function 0 define ON_CHIP_CTRL_REG 0xBC define ADC_DISABLE_TEMPERATURE_SENSOR 0x6FFFFFFF define I2C1_DISABLE 0x00020000 SB...

Page 68: ...x00 1 adc_channel set the selected ADC channel int i 0 for i 17 i 0 i Get the 16 th value as a valid one This is necessary to flush the FIFO 2 power down temperature sensor on SB function 0 ON_CHIP_CTRL_REG 31 1 2a activate power on the ADC on SB function 0 ON_CHIP_CTRL_REG 28 0 2b disable I2C1 which is needed at another place ON_CHIP_CTRL_REG 17 1 Read an modify the On Chip Device Control Registe...

Page 69: ...er_value if retVal 0 return 2 retVal PCICS_Write_Byte SB_PCICS1 ANALOG_SHARE_REG ANALOG_SHARE_DISABLE if retVal 0 return 2 4 select activate a channel 0 7 as binary coded value ADC_AUX_CHS outb adcChannel ADC_AUX_CHS 5 Mask Interrupt generation set IIT to 1 data in FIFO power on ADC set ScanMode bit 1 0 single 1 auto scan start conversion bit 0 1 ADC_CTRL_REG ADC_START_ONE_SHOT or ADC_START_AUTOSC...

Page 70: ...x For other operating systems it may be necessary to adapt the source code regarding include files or headers and the syntax of I O out commands because Linux is using outb value address instead of outb address value Table 4 3 Memory Map Address range dec Address range hex Size Description 4177920 4194303K FF00 0000 FFFF FFFF 16384K High BIOS Area 4173824K 4173887K FEC0 0000 FEC0 FFFF 20480K APIC ...

Page 71: ... Data Register Table 4 5 DMA Control Registers Address range hex Description 0000 000F Slave DMA Control Registers 0081 008B DMA Page Registers 00C0 00DE Master DMA Controller Registers 0481 048B DMA High Page Registers Table 4 6 Instruction Counter Registers Address range hex Description 0493 0490 Instruction Counter Register 0497 0494 User Instruction Counter Register 0498 UIC Start Register 049...

Page 72: ... Interrupt Control Registers 04D1 04D0 Interrupt Edge Level Control Registers Table 4 9 Keyboard Mouse Control Registers Address range hex Description 0060 Output Buffer Register 0064 Input Buffer Status Command Register Table 4 10 NMI Status and Control Registers Address range hex Description 0061 NMI Status and Control Register Table 4 11 Watchdog0 Control Registers Address range hex Description...

Page 73: ...Indirect Access Registers Address range hex Description 0022 Address Index Register for indirect access GPIO WDT0 0023 Data Register for indirect access GPIO WDT0 Table 4 14 CMOS Memory RTC Registers Address range hex Description 0070 CMOS Memory Address Register 0071 CMOS Memory Data Register Table 4 15 System Control Register Address range hex Description 0092 System Control Register Table 4 16 ...

Page 74: ...m Resource 0 System Timer 1 Keyboard Controller 2 Cascade for IRQ 15 8 not user accessible 3 Serial Port 2 or PC 104 Bus 4 Serial Port 1 or PC 104 Bus 5 OpenHCD USB Host Controller or PC 104 Bus 6 PC 104 Bus 7 PC 104 Bus 8 PC 104 Bus 9 PC 104 Bus 10 Serial Port 3 or PC 104 Bus 11 Serial Port 4 or PC 104 Bus 12 Mouse or PC 104 Bus 13 Math Coprocessor 14 Gbit Ethernet Intel I210 or PC 104 Bus 15 USB...

Page 75: ... 9 DMA Channels Table 4 19 DMA Channels DMA Data width System Resource 0 8 bits Available 1 8 bits Available 2 8 bits Available 3 8 bits Available 4 Reserved Cascade Channel 5 16 bits Available 6 16 bits Available 7 16 bits Available ...

Page 76: ...ang Hi Tech Park Pudong New Area Shanghai 201203 China Tel 86 21 5132 8988 Fax 86 21 5132 3588 Email market adlinktech com ADLINK Technology Beijing Address ҀᏖ ऎϞഄϰ䏃 1 োⲜ ࡼ ॺ E ᑻ 801 ᅸ 100085 Rm 801 Power Creative E No 1 Shang Di East Rd Beijing 100085 China Tel 86 10 5885 8666 Fax 86 10 5885 8626 Email market adlinktech com ADLINK Technology Shenzhen Address ഇᏖफቅऎ ᡔುफऎ催ᮄफϗ䘧 ᄫᡔᴃು A1 2 ὐ C ऎ 518057...

Page 77: ...Bundang gu Seongnam si Gyeonggi do Korea 463 825 Toll Free 82 80 800 0585 Tel 82 31 786 0585 Fax 82 31 786 0583 Email korea adlinktech com ADLINK Technology Singapore Pte Ltd Address 84 Genting Lane 07 02A Cityneon Design Centre Singapore 349584 Tel 65 6844 2261 Fax 65 6844 2263 Email singapore adlinktech com ADLINK Technology Singapore Pte Ltd Indian Liaison Office Address 50 56 First Floor Spear...

Page 78: ...www adlinktech com lippert rma php and fill in the blanks and fax it to 49 621 4321430 We ll return it to you with the RMA number For further RMA requests use this RMA email RMA EMEA adlinktech com Caution Deliveries without a valid RMA number are returned to sender at his own cost ADLINK Technology has a written Warranty and Repair Policy which can be retrieved from http www lippertembedded com s...

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