CIO-32
12
5.3.
Counter/Timers
All the three counter/timers (counter/timers 1 to 6 of the CIO-32) are functionality
identical.
Three output modes are available: pulse, one-shoot, and square-wave. The operating
mode of the counter/timer can be programmed either as retriggerable or as non-
retriggerable.
Up to four control lines are provided for timer/counter operation: counter input, gate
input, trigger input, and counter/timer output.
Each counter/timer provides a time-constant register containing the initial value of the
down-counter. At any time the current count register shows the content of the down-
counter. Two other registers are used: the control register to set the timer/counter
configuration, and the the timer/counter status register.
5.4. CIO Interrupt function
Five registers control the CIO interrupt functions: the master interrupt control, three
interrupt vector registers, and the current interrupt vector register.
The hardware daisy-chain operation is not implemented, because each CIO
controllers has its own interrupt request line into the IP logic interface.
5.5. Interrupt timing
The following timing descriptions give the delay for interrupt generation.
In bit port mode, an interrupt is generated when the pattern-recognition is detected.
In handshake port operation, the external ACKIN signal strobes the input data into the
CIO and an interrupt is actived to indicate to the host that a valid input data is present.
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