AP513 ACROPACK
USER
’S MANUAL
Acromag, Inc. Tel: 248-295-0310
- 21 -
http://www.acromag.com
- 21 -
www.acromag.com
3.2.2 General Purpose 16-bit Timer/Counter [TimerMSB, TimerLSB, TIMER, TIMECNTL]
The XR17V354 has a general purpose 16-bit timer/counter. The internal 125
MHz clock is used for the timer/counter. The timer can be set to be a single-
shot for a one-time event or re-triggerable for a periodic signal. An interrupt
may be generated when the timer times out and will show up as a Channel 0
interrupt. It is controlled through 4 configuration registers [TIMERCNTL,
TIMER, TIMELSB, TIMERMSB]. The TIMERCNTL register provides the Timer
commands such as start/stop.
3.2.2.1 TIMERMSB[31:24] and TIMERLSB[23:16]
The concatenation of the 8-bit registers TIMERMSB and TIMERLSB forms a
16-bit value which decides the time-out period of the Timer, per the
following equation:
Timer output frequency = Timer input clock / 16-bit Timer value
The least-significant bit of the timer is being bit [0] of the TIMERLSB with
most-significant-bit being bit [7] in TIMERMSB. Notice that these registers
do not hold the current counter value when read. Default value is zero
(timer disabled) upon powerup and reset. The ‘Reset Timer’ comm
and does
not have any effect on this register.
3.2.2.2 TIMERCNTL[7:0] Register
The bits [3:0] of this register are used to issue commands. The commands
are self-clearing, so reading this register does not show the last written
command. Reading this register returns a value of 0x01 when the Timer
interrupt is enabled and there is a pending Timer interrupt. It returns a value
of 0x00 at all other times. The default settings of the Timer, upon power-up,
a hardware reset or upon the issue of a ’Timer Reset’ command are:
•
Timer Interrupt Disabled
•
Re-triggerable mode selected
•
Internal 125MHz clock selected as clock source
•
Timer output not routed to MPIO[0]
•
Timer stopped
Table 3.6 Timer Control Register
TIMERCNTL[7:4] Reserved
