Acromag 948 Series, User Manual

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AVME948x USER'S MANUAL Digital I/O Board
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Table 3.2: Digital I/O Board Identification (ID) PROM
Hex Offset
From Board
Base Address
ASCII
Character
Equivalent
Numeric
Value
(Hex) Field Description
01 V 56 All VME Boards
03 M 4D Have
05 E 45 “VMEID”
07 I 49
09 D 44
0B A 41 Manufacturer
0D C 43 ID - “ACR” for
0F R 52 Acromag
11 9 39 Board Model No.
13 4 34
Unique for Each
15 8 38
Model (4 Char +
17 0 30
3 Trailing Blanks)
19 20
1B 20
1D 20
1F 1 31 Number of Kbytes
of Address Space
Used. If equal “0”,
then Address
Space is indicated
at byte 29H.
21 20
23 20
25 20
27 20
29
↓
3F
Undefined
Reserved
Status/Control Register (Read/Write, 81)
The Status/Control Register reflects and controls functions
globally on the card.
MSB LSB
7 6 5 4 3 2 1 0
RSV RSV RSV SW
Rst Global
Int
Enable Global
Int
Pending Grn
LED Red
LED
The bits of the Status Control Register have the following
function:
BIT NAME DESCRIPTION
Bit 7 Reserved for future use - equals "0" if read
Bit 6 Reserved for future use - equals "0" if read
Bit 5 Reserved for future use - equals "0" if read
Bit 4 Software
Reset (W) Software Reset (W) - Writing a "1" to this bit
causes a software reset. Writing "0" or
reading the bit has no effect. A software reset
turns all of the ports off, which effectively
programs the ports for inputs. The effect of a
software reset on the various registers is
determined in the discussion of each of the
registers.
NOTE: If a reset is performed when interrupts
are enabled, then in order to completely reset
the AVME948x, it is necessary to perform two
software resets with a delay of at least 2
microseconds between them. This is to
prevent a spurious interrupt being caused by
the latency of the actual field output being read
back at a later time by the input circuit.
Bit 3 Global
Interrupt
Enable
(R/W) Global Interrupt Enable (R/W) - writing a "1" to
this bit enables interrupts to occur from the
AVME9480 card. A "0" prevents interrupts.
Reset Condition: Set to "0", all interrupts
disabled.
Bit 2 Global
Interrupt
Pending
(R) Global Interrupt Pending (R) - this bit will be a
"1" when there is an interrupt pending from any
of the interrupt inputs. This bit will be "0"
when there are no interrupts pending. Reset
condition: Set to "0", no interrupts pending.
Bit 1 Green
LED
(R/W) Green LED (R/W) - when written this bit will
control the state of the green LED on the front
panel. A "1" will turn it on, a "0" will turn it off.
Reading it will reflect its current state. Reset
Condition: Set to "0", LED off.
Bit 0 Red LED
(R/W) Red LED (R/W) - when written this bit will
control the state of the red LED on the front
panel. A 1 will turn it off, a 0 will turn it on.
Reading it will reflect its current state. Reset
Condition: Will read a "0", LED lit, and
SYSFAIL* is set low.
The status register bits 1 and 0, along with the Green and Red
LED’s, provide the user with a means of keeping track of a card's
functionality in the system. Since there is no intelligence on the
board, the host computer controls these bits. The following is one
possible use of these bits in the status register and the LED’s on the
front panel.
On power-up, the bits in the status register will read low, with
the Green LED OFF, the Red LED ON, and SYSFAIL* LOW. This
indicates that the board has failed or that it hasn't been tested yet.
The Status Register Bit 1 reads LOW and Bit 0 reads HIGH.
The LED’s will both be OFF and SYSFAIL* HIGH. This indicates
an inactive board.
The Status Register Bit 1 reads HIGH and Bit 0 reads LOW.
The LED’s will both be ON and SYSFAIL* LOW. This indicates that
the board is undergoing a diagnostic checkout.
The Status Register Bits 1 and 0 read HIGH. The Green LED
will be ON with the Red LED OFF and SYSFAIL* HIGH. This
indicates that the board is fully functional.
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