1.2 Channel input specifications
10
U5303A User's Manual
Front-end mezzanine
The front-end electronics are all mounted on a removable mezzanine card. In the event of accidental
damage or as components fatigue over time (e.g. relays in high duty cycle automated testing
applications), the mezzanine card allows for fast and efficient replacement.
Bandwidth and rise time
The bandwidth specification indicates the frequency at which an input signal will be attenuated by 3 dB
(approximately 30% loss of amplitude).
U5303A ADC cards with -F10 option offer a 650 MHz bandwidth limiter -also see
bypass the bandwidth limiter? (page 88)
.
Options
Input Frequency Range
BW Limiter selection
1 V FSR
2 V FSR
-F05
-SR0
—
DC to 400 MHz
(typical)
No BW limiter
-INT
-SR1/-SR2/-SR3
—
DC to 650 MHz
(typical)
650 MHz
-INT
-F10
-SR1/-SR2/-SR3
—
DC to 1.9 GHz
(typical)
DC to 2.0 GHz
(typical)
650 MHz
-INT
DC to 1.3 GHz
(typical)
Table 1.3
- Channel input bandwidth vs.ordered options.
The bandwidth also affects the minimum rise and fall times that can be passed through the front-end
electronics. A pulse with a very sharp edge will be observed to have a minimum rise time
T
min
determined by the front-end electronics. In general a pulse with a given 10-90% rise time
T
10-90real
will
be observed with a lower value given by:
T
10-90
2
=
T
10-90real
2
+
T
min
2
where T
min
(ns)≈0.35/
BW
(GHz).
Vertical resolution
The U5303A ADC Card uses a 12-bit ADC giving 4096 levels of ~0.25 mV average width when using
the 1 V FSR.
