51
Chapter 2
Advanced Chipset Features
Selecting “Advanced BIOS Features” from the Advanced Options menu displays the following screen.
The following table describes the parameters found in the sub-menu. Settings in boldface are the default and
suggested settings.
Typematic Rate Setting
Keystrokes repeat at a rate determined by the keyboard
controller-- when enabled, the typematic rate and typematic
delay can be selected.
*
Typematic Rate (Chars/Sec) 6
*
Typematic Delay (MSec) 250
Disabled/
Enabled
APIC Mode
Advanced Interrupt Controller. The I/O APIC handles
interrupts very differently than the 8259. (Refer to ICH2
EDS Rev 1.0 P6-39, 6.8)
Enabled
Disabled
MPS Version Control For OS Multi CPU for NT. system
1.4
/ 1.1
.
Parameter
Description
Option
DRAM Timing Selectable
CAS Latency Time
Active to Precharge Delay
DRAM RAS #to CAS# Delay
DRAM RAS# Precharge
DRAM Data Integrity Mode
SDRAM Timing
The default setting by your DRAM’s SPD.
The default setting by your DRAM’s SPD.
The default setting by your DRAM’s SPD.
The default setting by your DRAM’s SPD.
The default setting by your DRAM’s SPD.
1.5
/2/2.5/3
7
/6/5
3
/2
3
/2
Non-ECC
/ECCl
System BIOS Cacheable
E.F segment shadow RAM cacheable.
Enabled
/Disabled
Video BIOS Cacheable
C segment shadow RAM cacheable.
Enabled
/Disabled
Video RAM Cacheable
A.B segment shadow RAM cacheable.
Enabled
/Disabled
Delayed Transaction
ICH2 enables delayed transactions for internal
register, FWH, and LPC I/F accesses.
Enabled
/Disabled
Delay Prior to Thermal
Enables Pentium 4 thermal function - 16 miuntes
after POST.(only for ACPI OS)
16/
4/8/32 minutes
.
Parameter
Description
Options
Summary of Contents for Veriton 5200D
Page 6: ...VI ...
Page 9: ...IX Table of Contents ...
Page 19: ...10 Chapter 1 Main Board Layout Veriton 5200 ...
Page 34: ...Chapter 1 25 ...
Page 92: ...83 Chapter 5 ...
Page 94: ...85 Chapter 6 Veriton 5200 5200D Exploded Diagram ...
Page 99: ...Chapter 6 90 ...
Page 102: ...Appendix A 93 ...
Page 112: ...103 Appendix C ...
Page 116: ...107 Index ...