1.8
Second-level Cache
The board may come with either 256 or 512-KB pipelined-burst
second-level cache. Refer to the following table for the possible cache
configurations.
Table 1-11
Second-level Cache Configurations
Cache
Size
Data RAM
(9 ns)
Location
Tag RAM
(15 ns - U39)
Cacheable
Memory
256 KB
32K x 32 x 2 pcs.
U22, U23
32K x 8 x 1 pc
64 MB
512 KB
64K x 32 x 2 pcs.
U22, U23
32K x 8 x 1 pc
64 MB
1-
18
User’s Guide
