A
A
B
B
C
C
D
D
E
E
1
1
2
2
3
3
4
4
H
：
：
：
：
Integrated VRM enable
L
：
：
：
：
Integrated VRM disable
INTVRMEN
*
LOW= Disable (Default internal PD)
HIGH= Enable ( No Reboot)Disable TCO timer system reboot feature
*
*
Low = Disabled (Default)
This signal has a weak internal pull-down
On Die PLL VR Select is supplied by
*
(INTVRMEN should always be pull high.)
Prevent back drive issue.
ME debug mode,this signal has a weak internal PD
HDA_SDO
Boot BIOS
GPIO19
0
1
GPIO51
Boot BIOS Strap
0
0
1
0
SPI
-
Reserved
LPC
1
1
GPIO19 has internal Pull up
RTCRST close RAM door J1
High = Enabled [Flash Descriptor Security Overide]
1.5V when sampled high
1.8V when sampled low
Needs to be pulled High for Huron River platfrom
*
No use PU 10K +3VS
Debug Port DG 1.2 PU 4.7K +3VS
SPI ROM FOR ME (4MB)
Footprint 200mil
20mil
20mil
20mil
Reserve for EMI
L=500mil S=15mil
L=500mil S=15mil
HM70 not support
SATA for port1/port3
HDD1
11/30 Add
11/30 Add (EMI request)
12/1 Del
SPI ROM FOR ME (1MB)
Footprint 200mil
12/7 Change symbol of U18 from SA00000XT00 to SA000041O00
3/7 Add
SA00005MQ60
PCH_RTCX1
PCH_RTCRST#
PCH_SRTCRST#
SM_INTRUDER#
PCH_INTVRMEN
SM_INTRUDER#
PCH_SPKR
PCH_SPI_CLK
PCH_SPI_MISO
PCH_SPI_CS0#
PCH_JTAG_TCK
PCH_SATALED#
PCH_JTAG_TMS
PCH_JTAG_TDI
PCH_JTAG_TDO
HDA_SYNC_PCH
HDA_RST_PCH#
HDA_SDIN0
HDA_SDOUT_PCH
PCH_GPIO21
PCH_RTCX2
HDA_BITCLK_PCH
LPC_AD2
LPC_FRAME#
LPC_AD0
LPC_AD3
LPC_AD1
SERIRQ
PCH_GPIO19
SATA_COMP
RBIAS_SATA3
SATA3_COMP
HDA_BITCLK_PCH
HDA_RST_PCH#
HDA_SDOUT_PCH
PCH_INTVRMEN
PCH_SPKR
HDA_SDOUT_PCH
HDA_SYNC_PCH
HDA_SYNC_PCH_R
PCH_SPI_CLK_1
PCH_SPI_CS0#_1
PCH_SPI_MOSI_1
PCH_SPI_MISO_1
HDA_SYNC_PCH
SERIRQ
PCH_SATALED#
PCH_RTCX1
PCH_RTCX2
PCH_RTCRST#
PCH_SRTCRST#
PCH_GPIO21
PCH_GPIO19
SPI_WP1#
PCH_SPI_MISO_1
PCH_SPI_CS0#_1
SPI_HOLD1#
PCH_SPI_CLK_1
PCH_SPI_MOSI_1
PCH_SPI_CS1#_2
PCH_SPI_CS1#
PCH_SPI_MOSI
PCH_SPI_MOSI_2
PCH_SPI_MISO_2
PCH_SPI_CLK_2
PCH_SPI_CLK
PCH_GPIO23
PCH_SPI_CLK_1
PCH_SPI_CLK_2
HDA_BITCLK_AUDIO
PCH_SPI_MISO_2
PCH_SPI_MOSI_2
PCH_SPI_CS1#_2
PCH_SPI_CLK_2
SPI_WP2#
SPI_HOLD2#
PCH_GPIO23
+RTCVCC
+1.05VS_VTT
+1.05VS_VTT
+3VS
+VCCSUS3_3
+VCCSUS3_3
+3VS
+RTCVCC
+3VS
+3VS
+3VS
+3VS
+5VS
+CHGRTC
+RTCBATT
+RTCVCC
+3VS
+3VS
+3VS
+3VS
HDA_SDO
<29>
PCH_SPKR
<31>
HDA_SDIN0
<31>
HDA_BITCLK_AUDIO
<31>
HDA_SYNC_AUDIO
<31>
HDA_SDOUT_AUDIO
<31>
HDA_RST_AUDIO#
<31>
LPC_AD0
<29,30>
LPC_AD1
<29,30>
LPC_AD2
<29,30>
LPC_AD3
<29,30>
LPC_FRAME#
<29,30>
SERIRQ
<29,30>
SATA_PRX_DTX_N0
<24>
SATA_PRX_DTX_P0
<24>
SATA_PTX_DRX_N0
<24>
SATA_PTX_DRX_P0
<24>
Title
Size
Document Number
Rev
Date:
Sheet
of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
1.0
PCH (1/9) SATA,HDA,SPI, LPC, XDP
Custom
13
45
Friday, April 20, 2012
2011/11/22
2012/11/22
Compal Electronics, Inc.
Q1VZC M/B LA-8941P Schematic
Title
Size
Document Number
Rev
Date:
Sheet
of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
1.0
PCH (1/9) SATA,HDA,SPI, LPC, XDP
Custom
13
45
Friday, April 20, 2012
2011/11/22
2012/11/22
Compal Electronics, Inc.
Q1VZC M/B LA-8941P Schematic
Title
Size
Document Number
Rev
Date:
Sheet
of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
1.0
PCH (1/9) SATA,HDA,SPI, LPC, XDP
Custom
13
45
Friday, April 20, 2012
2011/11/22
2012/11/22
Compal Electronics, Inc.
Q1VZC M/B LA-8941P Schematic
R88
33_0402_5%
1
2
R94
37.4_0402_1%
1
2
R234
1K_0402_5%
@
1
2
U17
MX25L3206EM2I-12G_SO8
SA000041P00
CS#
1
SO
2
WP#
3
GND
4
SI
5
SCLK
6
HOLD#
7
VCC
8
R110
33_0402_5%
@
1
2
R96
33_0402_5%
1
2
R75
20K_0402_5%
1
2
R83
0_0402_5%
1
2
R104
33_0402_5%
1
2
R109
3.3K_0402_5%
1
2
R111
3.3K_0402_5%
1
2
R103
33_0402_5%
1
2
R105
33_0402_5%
1
2
R106
33_0402_5%
1
2
R92
33_0402_5%
1
2
R466
33_0402_5%
@
1
2
R74
0_0603_5%
@
1
2
R95
33_0402_5%
1
2
R84
1K_0402_5%
@
1
2
C165
0.1U_0402_16V4Z
1
2
C168
18P_0402_50V8J
1
2
C167
1
8
P
_
0
4
0
2
_
5
0
V
8
J
1
2
R93
1M_0402_5%
1
2
R81
10K_0402_5%
1
2
G
D
S
Q4
BSS138_NL_SOT23-3
2
1
3
R89
33_0402_5%
1
2
R100
33_0402_5%
1
2
C163
1U_0603_10V6K
1
2
R86
10K_0402_5%
@
1
2
R98
33_0402_5%
1
2
T10
PAD
@
T11
PAD
@
U18
MX25L8006EM2I-12G_SO8
SA000041O00
CS#
1
SO
2
SI
5
SCLK
6
VCC
8
WP#
3
GND
4
HOLD#
7
R97
49.9_0402_1%
1
2
C465
22P_0402_50V8J
@
1
2
R91
51_0402_5%
1
2
U16
BD82HM70
HM70@
R78
1M_0402_5%
1
2
T9
PAD
@
R99
750_0402_1%
1
2
R79
330K_0402_5%
1
2
R112
3.3K_0402_5%
1
2
C164
1U_0603_10V6K
1
2
R80
10K_0402_5%
1
2
R101
33_0402_5%
1
2
R85
10K_0402_5%
1
2
R82
1K_0402_5%
@
1
2
R76
20K_0402_5%
1
2
C166
10P_0402_50V8J
@
1
2
R107
10M_0402_5%
1
2
C466
22P_0402_50V8J
@
1
2
R90
0_0402_5%
@
1
2
R102
4.7K_0402_5%
1
2
R87
1K_0402_5%
1
2
R
T
C
I
H
D
A
S
A
T
A
LPC
SPI
JTAG
SATA 6G
U16A
COUGARPOINT_FCBGA989
HM77@
RTCX1
A20
RTCX2
C20
INTVRMEN
C17
INTRUDER#
K22
HDA_BCLK
N34
HDA_SYNC
L34
HDA_RST#
K34
HDA_SDIN0
E34
HDA_SDIN1
G34
HDA_SDIN2
C34
HDA_SDO
A36
SATALED#
P3
FWH0 / LAD0
C38
FWH1 / LAD1
A38
FWH2 / LAD2
B37
FWH3 / LAD3
C37
LDRQ1# / GPIO23
K36
FWH4 / LFRAME#
D36
LDRQ0#
E36
RTCRST#
D20
HDA_SDIN3
A34
HDA_DOCK_EN# / GPIO33
C36
HDA_DOCK_RST# / GPIO13
N32
SRTCRST#
G22
SATA0RXN
AM3
SATA0RXP
AM1
SATA0TXN
AP7
SATA0TXP
AP5
SATA1RXN
AM10
SATA1RXP
AM8
SATA1TXN
AP11
SATA1TXP
AP10
SATA2RXN
AD7
SATA2RXP
AD5
SATA2TXN
AH5
SATA2TXP
AH4
SATA3RXN
AB8
SATA3RXP
AB10
SATA3TXN
AF3
SATA3TXP
AF1
SATA4RXN
Y7
SATA4RXP
Y5
SATA4TXN
AD3
SATA4TXP
AD1
SATA5RXN
Y3
SATA5RXP
Y1
SATA5TXN
AB3
SATA5TXP
AB1
SATAICOMPI
Y10
SPI_CLK
T3
SPI_CS0#
Y14
SPI_CS1#
T1
SPI_MOSI
V4
SPI_MISO
U3
SATA0GP / GPIO21
V14
SATA1GP / GPIO19
P1
JTAG_TCK
J3
JTAG_TMS
H7
JTAG_TDI
K5
JTAG_TDO
H1
SERIRQ
V5
SPKR
T10
SATAICOMPO
Y11
SATA3COMPI
AB13
SATA3RCOMPO
AB12
SATA3RBIAS
AH1
R467
33_0402_5%
@
1
2
R230
10K_0402_5%
1
2
Y1
32.768KHZ_12.5PF_1TJF125DP1A000D
1
2
C467
22P_0402_50V8J
@
1
2
D1
BAS40-04_SOT23-3
1
2
3
R108
3.3K_0402_5%
1
2
R77
0_0603_5%
@
1
2
