Table 26:
Test points for phase-to-phase loop measuring element
Test point
R
X
Comment
P1
0
X1Fw
P2
R1Fw
X1Fw
P3
(0.8
∗
R1Fw
) +
RFPPFwZx
0.8
∗
X1Fw
P4
0.8
∗
RFPPFwZx
0.8
∗
RFPPFwZx
∗
tan
(
ArgLd
)
P5
RLd
0
P6
RFPPFwZx
0
OpLoadEnch
= Off
P7
0.5
∗
RLd
-0.5
∗
RLd
∗
tan (
ArgDir
)
P8
-0.5
∗
RFPPRvZx
X1Fw
P9
-0.8
∗
X1Fw
∗
tan
(
ArgNegRes
)
0.8
∗
X1Fw
1.
Inject the magnitude and angle of phase-to-phase voltage to achieve impedances at test points
P1, P2, …, P9.
2.
Test points P7 and P9 are intended to test the directional lines of impedance protection and
used to find directional accuracy for phase-to-phase faults.
3.
For each test point, observe that the start output signals START, STZx, STNDZx, STL1, STL2
and STPP are activated.
4.
Trip signals TRIP, TRZx, TRL1 and TRL2 will appear after set delay time of
tPPZx
if
OpModetPPZx
is set to On and
TimerSelZx
is set to Timers separated.
Testing the neutral voltage shift protection
GUID-9307ACC1-2E7C-42D1-B8E9-E7B576F7170D v2
1.
Set
SystemEarthing
to High impedance,
OPModeU0
to
On
, and
UMinDisp
to default value.
2.
Inject phase voltage and phase currents such that there is no start output STELEMST
observed from starting element. Also, make sure that residual voltage is measured with this
condition.
3.
If this measured neutral voltage/residual voltage exceeds set
UMinDisp
value, the outputs
TRIP, TRL1 and TRL2 get activated after a set delay of
tU0
.
Testing the stub line with line end in-feed protection in compensated earthed systems
GUID-20A7B775-98C9-4A66-BA9B-07A88DFA1341 v2
1.
Set
ModeStubLine
to On and set
UPPMin
and
KU
to default values.
2.
Also, set
ModePhPref
to Equal Priority.
3.
Inject phase voltage and phase currents so that there is STIE detected for a test condition
created and no pick-up from underimpedance starting i.e. STNDZL1 and STNDZL2 are low.
4.
If the injected phase L2 voltage is higher than
KU
times phase L1 voltage and injected phase-
to-phase voltage is above set
UPPMin
value, the trip outputs TRIP and TRL1 will be activated
after a set delay of
tI0Stub
.
5.
Similarly, if the injected phase L1 voltage is higher than
KU
times phase L2 voltage and injected
phase-to-phase voltage is above set
UPPMin
value, the trip outputs TRIP and TRL2 will be
activated after a set delay of
tI0Stub
.
6.
Repeat step 5 and if
ModePhPref
is set to L1 before L2, the trip output TRIP and TRL2 will be
activated after additional delay time of
tGL2
(that is, after
tI0Stub
+
tGL2
) when
OpModetGL2
is
set to On.
Section 10
1MRK 506 377-UEN Rev. K
Testing functionality by secondary injection
94
Railway application RER670
Commissioning manual
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