Group alarm logic function ALMCALH
The group alarm logic function ALMCALH is used to route
several alarm signals to a common indication, LED and/or
contact, in the IED.
Group warning logic function WRNCALH
The group warning logic function WRNCALH is used to route
several warning signals to a common indication, LED and/or
contact, in the IED.
Group indication logic function INDCALH
The group indication logic function INDCALH is used to route
several indication signals to a common indication, LED and/or
contact, in the IED.
Basic configurable logic blocks
The basic configurable logic blocks do not propagate the time
stamp and quality of signals (have no suffix QT at the end of
their function name). A number of logic blocks and timers are
always available as basic for the user to adapt the configuration
to the specific application needs. The list below shows a
summary of the function blocks and their features.
These logic blocks are also available as part of an extension
logic package with the same number of instances.
• AND function block. Each block has four inputs and two
outputs where one is inverted.
• GATE function block is used for whether or not a signal
should be able to pass from the input to the output.
• INVERTER function block that inverts one input signal to the
output.
• LLD function block. Loop delay used to delay the output
signal one execution cycle.
• OR function block. Each block has up to six inputs and two
outputs where one is inverted.
• PULSETIMER function block can be used, for example, for
pulse extensions or limiting of operation of outputs, settable
pulse time.
• RSMEMORY function block is a flip-flop that can reset or set
an output from two inputs respectively. Each block has two
outputs where one is inverted. The memory setting controls
if, after a power interruption, the flip-flop resets or returns to
the state it had before the power interruption. RESET input
has priority.
• SRMEMORY function block is a flip-flop that can set or reset
an output from two inputs respectively. Each block has two
outputs where one is inverted. The memory setting controls
if, after a power interruption, the flip-flop resets or returns to
the state it had before the power interruption. The SET input
has priority.
• TIMERSET function has pick-up and drop-out delayed
outputs related to the input signal. The timer has a settable
time delay.
• XOR function block. Each block has two outputs where one is
inverted.
Extension logic package
The logic extension block package includes additional trip
matrix logic and configurable logic blocks.
Logic rotating switch for function selection and LHMI
presentation SLGAPC
The logic rotating switch for function selection and LHMI
presentation SLGAPC (or the selector switch function block) is
used to get an enhanced selector switch functionality
compared to the one provided by a hardware selector switch.
Hardware selector switches are used extensively by utilities, in
order to have different functions operating on pre-set values.
Hardware switches are however sources for maintenance
issues, lower system reliability and an extended purchase
portfolio. The selector switch function eliminates all these
problems.
Selector mini switch VSGAPC
The Selector mini switch VSGAPC function block is a
multipurpose function used for a variety of applications, as a
general purpose switch.
VSGAPC can be controlled from the menu or from a symbol on
the single line diagram (SLD) on the local HMI.
Fixed signal function block
The Fixed signals function FXDSIGN generates nine pre-set
(fixed) signals that can be used in the configuration of an IED,
either for forcing the unused inputs in other function blocks to a
certain level/value, or for creating certain logic. Boolean,
integer, floating point, string types of signals are available.
One FXDSIGN function block is included in all IEDs.
Elapsed time integrator with limit transgression and overflow
supervision (TEIGAPC)
The Elapsed time integrator function TEIGAPC is a function that
accumulates the elapsed time when a given binary signal has
been high.
The main features of TEIGAPC
• Applicable to long time integration (≤999 999.9 seconds).
• Supervision of limit transgression conditions and overflow.
• Possibility to define a warning or alarm with the resolution
of 10 milliseconds.
• Retaining of the integration value.
• Possibilities for blocking and reset.
• Reporting of the integrated time.
1MRK 505 346-BEN -
Line differential protection RED670 2.1 IEC
Product version: 2.1
38
ABB
