Hardware Development Guide of Module Product
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using the rise edge. Under the power-on status, pull POWER_ON PIN low, then power off, pull
POWER_ON PIN with a low pulse, then reset. POWER_ON PIN is pulled down via a 200K
resistance to GND inside the module.
The PERST# signal (PIN No: 22) is the system reset signal of ZM8620, active low. Table
illustrates its control logic.
Note: Do not directly connect this signal to the positive end of power supply.
Table 4-6 Definition and Description of PERST# Signal
PERST#
ZM8620 Status
„1‟
ZM8620 is in the normal
working status.
„0‟ and ≥100ms
RF is in the OFF mode,
ZM8620 is reset.
Figure 4-3 Reference Circuit Design of PERST# Signal
4.9
WAKE# Signal
Figure illustrates the reference connection circuit of WAKE# signal. The WAKE# signal (PIN
No.: 1) is an output signal, active low level or low fall edge. This signal is a reserved signal for
ZM8620 to wake up the system host. ZM8620 pulls up the power level to VDD_3V3 internally by
the 10Kohm resistance. It is recommended to connect the 47ohm resistance to the GPIO PIN
on the main chip (If this GPIO PIN is on the system side, it can wake up the host). Note: Do not
directly connect this signal to the positive end of the power supply.
Содержание ZM8620
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