ZETRON 4010, Руководство по обслуживанию

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Model 4010 Radio Dispatch Console Service Manual
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The CLK1 signal from the microprocessor clocks the B0 to B7 matrix data into latches U1 and U2.
The outputs of U1 and U2 drive the switch LEDs.
60-BUTTON PANEL (702-9432)
The scanning matrix outputs of U33 and U25 also go to the 60 Button Panel on P9. The C0 to C7
matrix data is connected to U10, U12, U23, U15 and U27 (renamed to Rx and Sx) on the 60 Button
Panel. U10, U12 and U27A outputs set the appropriate signal levels to the switch matrix. The indivi-
dual switch status is selected using RA through RC of U10 and the COM2 output is read by the
microprocessor during each matrix cycle.
The B0 to B5 matrix data is buffered by U25 and connected to 20 74HCT244 latches. The CLK* and
GRN/RED* signals are used to form the GRN CLK and RED CLK signals. The SA through SC
signals are the addresses of the multiplexes U12 and U24. U12 selects the appropriate green LED
latch, U1 through U9 and U26, that GRN CLK will clock the B0 to B5 data into. U24 does the same
for RED CLK and the red LEDs latches U11 and U13 through U21.
DUAL CHANNEL CARD (950-9715)
The Dual Channel Cards (DCC) are installed on the Control Board in six connectors J7 through J12
on sheet 5 of the Control Board schematic. These connectors also interface the DCC to the output
connectors J2, J3, and J4 as shown on sheet 6. Each DCC is capable of interfacing two radio chan-
nels with local control if no other optional cards are installed. The functionality of a channel can be
enhanced by adding the Tone Remote System Adapter to add tone remote capability to each channel
or adding the DC Remote Daughter Card to each channel that requires DC remote control.
The DCC schematic 008-9377 shows the interface connector on sheet 2. The SPI bus signals DI, DO,
SCLK* and two enable signals ENCHA* and ENCHB*, are the digital communication to the board.
The two channels function similar and only channel A will be followed. The data in from the micro-
processor (DI) are synchronously clocked to the 16 bit serial shift register U20 and U21 using the
CHWR* and ENCHA* signals. The data to the microprocessor (DO) is simultaneously clocked out
of U15 and an 8-bit shift register on the daughter board if one is installed at connector P2. U20 and
U21 form a 16-bit output latch, which controls the operation of the board. The outputs are buffered
by U22 and U23, which convert the 5V signals to 12V to drive the various audio switches. U15 and
the daughter card latch form a 16 bit input port which monitor the activity of the board.
The audio paths for channel A are shown on sheet 2. The four input audio busses are GT-BUS (guard
tone bus), PAT-TX-BUS (patch transmit bus), TONE-BUS (ANI and alert tones) and MIC-BUS
(operator’s audio). These busses are switched by the three switches of U13 to the input of U2A. The
audio switch U14B is used to select high or low level guard tone. U9A connects the output of U2A
to transmitting amplifier U2B. The potentiometer R11 sets the transmit level to the radio. The maxi-
mum peak to peak level on each bus is –10 dBm. The maximum gain on the card is 20 dB, which
gives the maximum output level of +10 dBm. The output of U2B goes the buffer U2C and the
inverting buffer U3A, which form the push/pull amplifier to the transformer T1. Switches U1A and
U1B send the transmitted audio through R4 while transmitting. R4 sets the transmit impedance to
600 ohms. During 2W (two wire) receive, the audio is switched through U1C. JP1 sets the receive
impedance to 600 ohms if in position A and to 3500 ohms if in position B. CR1 and CR2 are protec-
tion diodes. The output transformer T1 has the DC blocking capacitor C5 on the center taps of the
output windings.
The XMIT-UP-A signal control the transmit switches and relay K1. The relay contacts are routed
through JP5 and form the isolated PTT signal on the external connector. The BUSY-OUT-A signal is
driven by the open collector driver U30F to the external connector. The time of this signal is very
similar to the transmit signal PTT. The JP4 jumper setting controls the guard tone switch U13B.
Position A disables the guard tone switch and should be in this position for all channels that are not
tone controlled. Position B allows the switch to be controlled by the ENGT-A signals, which is the
normal position for tone control. Position C enables XMIT_UP_A to control the switch and is only
used when retrofitting early production units.
The 2W receive from U1C goes to potentiometer R10 for setting the receive audio level to the sum-
ming amplifier U3A. The 4W (four wire) audio input signals 4W-RX-A+, or -, come into the 10K
ohm transformer T2. JP2 sets the impedance of the 4W input to 600 ohms in position A or 10K ohms
in position B. The output of T2 goes to potentiometer R9 which sets the receive level and to the
summing amplifier U3A. The output of U3A goes to the AGC circuit formed by U3B. The receive
level should be adjusted by inputting the minimum audio level expected in the field and setting the
adjustment potentiometer for the knee of compression of the AGC circuit. The adjustment potentio-
meter for the audio receive circuit not use should be set for no audio (fully CCW) so the circuit does
not add any noise to the summing node of U3A.
The signal level at the output of the AGC circuit (U3B-7) is limited to 1.2 V peak to peak. The AGC
circuit will maintain this maximum peak level as long as the input is above the knee of compression
and within the 30dB (minimum) range. This signal drives U4A whose output forms a peak detector
and generates the CALLA signal when audio is present. The AGC output also drives the U4B ampli-
fier, which sets the audio peak level to –10dBm for the RXA test point and the REC-A signal
through U8B to the external interface. The RXA signal also goes to the PAT_RX_BUS through
switch U9C. U12 multiplexes the RXA signal through a resistive network to give 4dB adjustment
steps. The VOL signals to U12 selects which resistive path the audio takes and the MUTE_A signal
will inhibit all switches from closing and provide a completed muted signal. The output amplifier
U8A will drive either the SEL-BUS or UNS_BUS depending on the U28B switch setting. If no audio
muting is required, the audio will be switched through R73 and the peak output level of U8A will be
at –10dBm.
PHONE PATCH CARD (950-9719 OR 950-9720)
The Phone Patch interface to the Control Board is connector J6. This will interface either a Phone
Patch Card (with one phone channel) or the Dual Phone Patch Card. The card will allow the operator
to utilize a standard loop start telephone line. Both telephone circuits are identical. Only the opera-
tion of the A channel will be described.
The Phone Patch schematic 008-9403 (single) or 008-9522 (dual) shows the interface connector on
sheet 2. The SPI bus signals DI, DO, SCLK* and two enable signals ENCHA* and ENCHB*, are the