CLM920_AC5 Mini PCIE LTE Module Hardware Manual
Shanghai Yuge Information Technology co., LTD
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Figure 3-8 Reset reference circuit
Table 3-6 RESET pin parameters
Symbol
Description
Min
Typical
Max
unit
Treset
Low-level pulse width
150
200
450
ms
VIH
RESET input high voltage
1.17
1.8
2.1
V
VIL
RESET input low voltage
-0.3
0
0.8
V
Reset RESET sequence is as follows
：
Figure 3-9 Reset timing diagram
The CLM920_AC5 Mini PCIE module supports AT command reset. The AT command is at +
cfun = 1,1 to restart the module. Detailed instructions can be found in the CLM920_AC5 AT
instruction set manual.
3.5 USB interface
CLM920_AC5 Mini PCIE module USB interface supports USB2.0 high-speed protocol,
supports slave mode, does not support USB charging mode. The USB input and output wiring
